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VHDL-FPGA-Verilog list
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usb_device
Downloaded:0
FPGA a usb device generic nois under implementation.
Date
: 2025-08-28
Size
: 3kb
User
:
林子
ps2_keyboard
Downloaded:0
ps2 keyboard verilog hdl language code
Date
: 2025-08-28
Size
: 4kb
User
:
林子
SOPC_picture
Downloaded:0
Digital photo frame design based on sopc code specific steps
Date
: 2025-08-28
Size
: 1.35mb
User
:
liwei
verilog
Downloaded:0
the verilog hdl write a serial program, compile simulation have passed
Date
: 2025-08-28
Size
: 9.7mb
User
:
林子
tanchishe
Downloaded:0
Written using a hardware description language VHDL game can be downloaded to the experimental board to achieve the 8* 8 dot matrix, Snake game
Date
: 2025-08-28
Size
: 564kb
User
:
王凯鹏
six-digit-counter-with-tb
Downloaded:0
VHDL source code of six digit counter with testbench,with comments included
Date
: 2025-08-28
Size
: 3kb
User
:
fangshan
16-bit-A-DCa16-bit-DAC-VHDL
Downloaded:0
16-bit Analogue to Digital Converter & 16-bit Digital to Analogue Converter VHDL source code. Simulated in modelsim
Date
: 2025-08-28
Size
: 1kb
User
:
fangshan
2-to-4-Decoder-with--Configuration
Downloaded:0
2-to-4 Decoder with Testbench and Configuration This set of design units illustrates several features of the VHDL language including: Using generics to pass time delay values to design entities. Design hierarchy using in
Date
: 2025-08-28
Size
: 1kb
User
:
fangshan
divider-code
Downloaded:0
This document is a the FPGA development program, verilog language starting operation, welcomed the reference.
Date
: 2025-08-28
Size
: 1kb
User
:
秦艳召
LightsController
Downloaded:1
TRAFFIC LIGHTS
Date
: 2025-08-28
Size
: 378kb
User
:
liyanjia
crc16-
Downloaded:0
This document describes a CRC checksum method development language verilog. Write their own procedures, including test code. Welcome reference
Date
: 2025-08-28
Size
: 1kb
User
:
秦艳召
Led_seg7
Downloaded:0
This document gives a seven-segment digital tube verilog code, and attach the test code.
Date
: 2025-08-28
Size
: 1kb
User
:
秦艳召
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4310
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