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VHDL-FPGA-Verilog list
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use cyclone2 board,use lcd to show the week,use seg to show the time
Date : 2026-01-21 Size : 1.63mb User : 行者无疆

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Achieve 1: LED light water A controllable LED Marqu
Date : 2026-01-21 Size : 394kb User : 郑旗

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verilog prormmaing language exercises, introduction
Date : 2026-01-21 Size : 1kb User : topfun

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" Mountain and Flowing Water" beep music based on the classic Chinese music FPGA implementation developed using verilog achieve.
Date : 2026-01-21 Size : 1kb User : 小梦

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Vending machines based on FPGA verilog language
Date : 2026-01-21 Size : 1kb User : 小梦

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Based on verified DE2-115 development board FPGA to achieve real-time alarm, timekeeping, timing, time adjustment
Date : 2026-01-21 Size : 2kb User : 小梦

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Raised cosine FIR filter based FPGA development 11 order of half-band decimation filter used in reader baseband filtering, using verilog language implementation.
Date : 2026-01-21 Size : 1kb User : 小梦

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64 order raised cosine FIR FPGA-based parallel filters, implemented using iso18000.6c standard with a low-pass filtering effect imitation on the board has passed validation, using verilog language.
Date : 2026-01-21 Size : 4kb User : 小梦

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By hands-on practice, familiar with the method of using Quartus II design FPGA
Date : 2026-01-21 Size : 920kb User : 凉均兄

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Incurred and realized by hands familiar with Altera Basic macro functions
Date : 2026-01-21 Size : 135kb User : 凉均兄

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H264 decoder
Date : 2026-01-21 Size : 439kb User : peter

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Frame detection based on FPGA for OFDM, a simplified algorithm, using less complex multiplier, easily implemented in hardware, and save resources, the SNR performance is slightly lower than the previous algorithm, but ve
Date : 2026-01-21 Size : 313kb User :
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