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VHDL-FPGA-Verilog list
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Passive buzzer driver of VHDL package, has been verified on board
Date : 2025-08-20 Size : 1kb User : 夏鹏

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Digital tube scanner, has been verified on the development board to use
Date : 2025-08-20 Size : 1kb User : 夏鹏

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FPGA code stepper motor control, including directional control the module excitation mode selection module, positioning module, and the output pulse.
Date : 2025-08-20 Size : 160kb User : 刘开发

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For the Xilinx Zynq PS+ PL, PS Add IP core, and then add GPIO IP core and connected to the on-board LED, led logic
Date : 2025-08-20 Size : 4.56mb User : 刘开发

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Software acceleration/deceleration methods for industrial robots and CNC machining tools
Date : 2025-08-20 Size : 747kb User : 刘开发

An efficient acceleration for fast motion of industrial robots
Date : 2025-08-20 Size : 572kb User : 刘开发

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ccd driver
Date : 2025-08-20 Size : 219kb User : haoyuan

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Traffic light controlled crossroads of traffic lights analog state machine implementation, no time
Date : 2025-08-20 Size : 1.74mb User : xiefei

Based the PCIE interface design of the wishbone and the endpoint IP, PCIE hard core endpoint module and Wishbone bus specification, application WHDL language programming the wishbone bus master and slave port
Date : 2025-08-20 Size : 292kb User : 张轶

microprocessor design principles and practices with VHDL
Date : 2025-08-20 Size : 4.16mb User : Lang

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Verilog Golden Reference Guide , first alphabetical index describes the Verilog language instruction
Date : 2025-08-20 Size : 460kb User : Lang

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fpga verilog HDl MIF contral read and write
Date : 2025-08-20 Size : 7.24mb User :
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