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VHDL-FPGA-Verilog list
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C3_8
Downloaded:0
fpga Verilog HDL 38 decoder combinational logic circuit
Date
: 2025-08-20
Size
: 2.84mb
User
:
李
moore-FSM
Downloaded:0
The program describes the simulation and the function and role of a mole finite state machine
Date
: 2025-08-20
Size
: 11kb
User
:
Armstrong
three-FSM
Downloaded:0
This procedure describes the simulation and three always finite state machine instance
Date
: 2025-08-20
Size
: 11kb
User
:
Armstrong
Mealy-FSM
Downloaded:0
This procedure describes the simulation and Mealy finite state machine instance
Date
: 2025-08-20
Size
: 11kb
User
:
Armstrong
gray
Downloaded:0
This program is to achieve a Gray code and binary code conversion problems
Date
: 2025-08-20
Size
: 11kb
User
:
Armstrong
PluseMaker
Downloaded:0
Second pulse generator frequency is adjustable with digital display
Date
: 2025-08-20
Size
: 3.93mb
User
:
刘浩
PWM-design-Based-on-FPGA
Downloaded:0
The design is FPGA-based control of the PWM signal output system, to EP3C5E144C8 chip as the core, to achieve adjustable duty cycle, frequency, pulse width modulation signal by the reference signal and the input signal i
Date
: 2025-08-20
Size
: 6.4mb
User
:
席晓明
miaobiao
Downloaded:0
VHDL prepared a digital clock, you can complete the timing function.
Date
: 2025-08-20
Size
: 616kb
User
:
李鹏飞
cyclone_lcd_controller
Downloaded:0
LCD driver for cyclone II of Altera company
Date
: 2025-08-20
Size
: 2kb
User
:
Jinspace
rxtx
Downloaded:0
RS232 it is imoling rs232
Date
: 2025-08-20
Size
: 1kb
User
:
jixkx
Matlab
Downloaded:0
Based on the digital baseband transmission system MATLAB simulation code, and related documents.
Date
: 2025-08-20
Size
: 6kb
User
:
廖驰
usb
Downloaded:0
Realization of USB communication
Date
: 2025-08-20
Size
: 2kb
User
:
shanjiong
«
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.12
.13
.14
.15
.16
1117
.18
.19
.20
.21
.22
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4310
»
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