VHDL-FPGA-Verilog List Page 1040

VHDL-FPGA-Verilog list

Sort by ：

« 1 2 ... .35 .36 .37 .38 .39 1040.41 .42 .43 .44 .45 ... 4310 »

zyled Downloaded：0: EDA technology used in quartus2 to achieve a traffic signal controller, good performance
Date : 2025-08-12 Size : 1.7mb User : Zoe
zyplj Downloaded：0: Using EDA technology, the use of software to complete Quartus2 digital frequency meter design and implementation, which includes timers, controller design, very practical
Date : 2025-08-12 Size : 1.81mb User : Zoe
qpskdds Downloaded：0: pci card design features a direct digital frequency synthesis (DDS, Direct Digital Synthesis), DDS is a novel frequency synthesis. DDS technology is a form of the series of digital signals into an analog signal through t
Date : 2025-08-12 Size : 1mb User : lvhenan
qpskddc Downloaded：0: fpga implementation dds and downconversion. DDS technology with frequency switching time is short, high frequency resolution, the frequency stability is high, the output signal frequency and phase can be quickly switched
Date : 2025-08-12 Size : 15.33mb User : lvhenan
D-type-flip-flop Downloaded：0: Design of a D-type flip-flop, the input CK (clock signal, ↑ indicates rising time), D (data), Clear end (" 0" is cleared), the output Q
Date : 2025-08-12 Size : 3kb User : 许光达
ad9957-verilog Downloaded：1: Quadrature modulation chip,. V file, but no documentation, only as a reference
Date : 2025-08-12 Size : 2kb User : 张路平
4BITMCUVERILOG Downloaded：0: 4 soft design, using FPGA language, has been successfully applied
Date : 2025-08-12 Size : 5.46mb User : baoli
FPGA_UART Downloaded：0: FPGA Implementation of UART serial communication protocol
Date : 2025-08-12 Size : 5.8mb User : zhuronghua
vhdl Downloaded：0: vhdl program highlights for some of the school' s junior staff learn about quartus
Date : 2025-08-12 Size : 168kb User : 张杨
FIR Downloaded：0: Using Verilog language FIR filter, the Xilinx Spartan-6 run through, is a very good program Verlog
Date : 2025-08-12 Size : 8kb User : 于洋
vga_640x460_spirte Downloaded：0: Using Verilog language program vga display stripes, ribbons can be displayed on the monitor in the Xilinx Spartan-6 run through, is a very good program Verlog
Date : 2025-08-12 Size : 7kb User : 于洋
SRAM Downloaded：0: SRAM using Verilog language literacy program, do not add the IP core in Xilinx Spartan-6 run through, is a very good program Verlog
Date : 2025-08-12 Size : 9kb User : 于洋

« 1 2 ... .35 .36 .37 .38 .39 1040.41 .42 .43 .44 .45 ... 4310 »

Search in result