VHDL-FPGA-Verilog List Page 103

VHDL-FPGA-Verilog list

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csa_codes Downloaded：0: carry_select_adder for 16-bit in verilog
Date : 2025-05-17 Size : 2kb User : GIRISH
Asynchronous FIFO Architectures Downloaded：0: Asynchronous FIFO Architectures Vijay A. Nebhrajani
Date : 2025-05-17 Size : 196kb User : 啸傲.
LED Downloaded：0: Using verilog language, LED lights on the FPGA development version
Date : 2025-05-17 Size : 178kb User : wz2016520157
PLL_test Downloaded：0: Phase-locked loop with FPGA to achieve frequency division, the frequency of the reference clock through the PLL core frequency to generate a variety of clock generation.
Date : 2025-05-17 Size : 230kb User : 棋墨黑白
27_adda_test Downloaded：0: ADDA debugger routines with black gold FPGA, and learn together with everyone to learn progress, mainly about the debug of 8 ADDA.
Date : 2025-05-17 Size : 4.21mb User : 棋墨黑白
07_uart_test Downloaded：0: Using FPGA to debug UART in parallel, make comparison with the way of MCU debugging
Date : 2025-05-17 Size : 352kb User : 棋墨黑白
10_rom_test Downloaded：0: Explain Xilinx Spartant_6 Series FPGA ROM IP core debugging process, for your reference learning
Date : 2025-05-17 Size : 4.04mb User : 棋墨黑白
秒表 Downloaded：0: The function of timing and countdown of the stopwatch based on VHDL language.
Date : 2025-05-17 Size : 436kb User : 水盼
VGA_text Downloaded：0: Implement vga using verilog,which is including the text contents.
Date : 2025-05-17 Size : 2.31mb User : 缘木
AT24C02_IIC Downloaded：0: This zip contains an AT24C02 IIC interface, which can read from 24c02 and write data into it.
Date : 2025-05-17 Size : 7.14mb User : 蝠蝙
lcd5110_耗费资源少 Downloaded：0: This zip file contains a quartus ii project, which can driven the LED screen LCD5110.
Date : 2025-05-17 Size : 4.51mb User : 蝠蝙
No.201710061347=UART_Verilog Downloaded：0: 1. hardware platform: FPGA; 2. programming language: Verilog; The Verilog implementation version of 3. serial port communication RS232;
Date : 2025-05-17 Size : 55kb User : 记忆工人2017

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