Embeded-SCM Develop List Page 810

Embeded-SCM Develop list

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Micrium_ZC702_OS3-CAN-No-Src Downloaded：0: Micrium_ZC702_OS3 CAN No Src
Date : 2025-06-29 Size : 554kb User : denisys
Micrium_XSDK_Repository_ucos_v1_11 Downloaded：0: ucos BSP can be use as the BSP v 1.11
Date : 2025-06-29 Size : 10.93mb User : denisys
Micrium_Xilinx_Repo_1_42_ Downloaded：0: ucos BSP can be use as the BSP v 1.42
Date : 2025-06-29 Size : 27.21mb User : denisys
shuzizhong Downloaded：0: Design of multi-function digital clock based on vhdl
Date : 2025-06-29 Size : 195kb User : lin林
Micrium_ZC702_OS2-CAN-No-Src_ Downloaded：0: Micrium_ZC702_OS2-CAN-No-Src 2
Date : 2025-06-29 Size : 507kb User : denisys
xapp1065 Downloaded：0: Xilinx xapp 1065 application note
Date : 2025-06-29 Size : 19kb User : denisys
myClock Downloaded：0: Four bit digital tubes display 24 hour clocks
Date : 2025-06-29 Size : 325kb User : wkhno
04_led_test Downloaded：0: FPGA introductory experiment, simple flow lamp, the use of counter is more standard
Date : 2025-06-29 Size : 2.2mb User : konan007
eeprom_test Downloaded：0: read and write eeprom with iic interface
Date : 2025-06-29 Size : 1.73mb User : konan007
rom_test Downloaded：0: rom read and write,this is a good document for study FPGA verilog
Date : 2025-06-29 Size : 4.05mb User : konan007
uart_test Downloaded：0: Serial port design based on FPGA, introductory information
Date : 2025-06-29 Size : 351kb User : konan007
spi Downloaded：0: Through the SPI interface to a 16 bit length 8 configuration register assignment. Width 16 digits represent the information stored for 16, length 8, is the representative of the register depth is 8. When the first bit of
Date : 2025-06-29 Size : 1kb User : 雪宝y

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