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AT89C51+DS18B20's Proteus simulation schematic, containing source code, including Proteus Pro 7.8 SP2 simulation.
Date : 2025-06-23 Size : 74kb User : leeeux

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os version Description
Date : 2025-06-23 Size : 18kb User : LimYoungJin

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AT89C51+24C04A's Proteus simulation schematic, containing source code, including Proteus Pro 7.8 SP2 simulation.
Date : 2025-06-23 Size : 44kb User : leeeux

The four axis code of 51 single chip microcomputer
Date : 2025-06-23 Size : 1.69mb User : Adreamm

MTK/mediatek 2 x 2 MT7612EN 5.0 GHz dual-band wireless LAN card chip The MT7612E is a highly integrated single chip, built a 2 x 2 dual-band wireless LAN, wireless.It supports the draft standard IEEE802.11 ac, and provid
Date : 2025-06-23 Size : 2.23mb User : yushibin

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FIFO IP test project, completed testbench .direct compilation and simulation
Date : 2025-06-23 Size : 1.87mb User : dufanbao

The temperature reading can be realized and displayed on the 1602 LCD screen in real time and corresponding measurement time is corresponding.
Date : 2025-06-23 Size : 1021kb User : 郝建章

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English Version fdsfdsfds
Date : 2025-06-23 Size : 47kb User : 哦哦哦1

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Key and 320240 interface
Date : 2025-06-23 Size : 11kb User : ssqq1989

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Realizing frequency display and led flicker by scanning the key
Date : 2025-06-23 Size : 5kb User : guoerpro

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Multi-function digital species can realize the function of time alarm clock and other functions
Date : 2025-06-23 Size : 2kb User : guoerpro

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Use Verilog to realize the function of the mode sixty count, 0-1-2-3-4-5-....-59-0-1-2.
Date : 2025-06-23 Size : 1kb User : guoerpro
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