Embeded-SCM Develop List Page 32099

Embeded-SCM Develop list

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single-key-adjust-clock Downloaded：0: display the data in the 70H-er cell, with a total of six Yang digital LED Display, P1 mouth of the code output data, P3 I scan control for each LED digital-rungs of time to each of these cycles. Timer T0, T1 overflow cyc
Date : 2025-09-17 Size : 10kb User : fengming
Flashc Downloaded：0: Norflash general reader, such as the operation of erasure source
Date : 2025-09-17 Size : 22kb User : 任博
resetlpc935 Downloaded：1: the LPC935 Philips MCU reset procedure FOSS
Date : 2025-09-17 Size : 20kb User : 任博
Protel2004DXPlib Downloaded：0: personal production of components protel2004dxp for Packaging
Date : 2025-09-17 Size : 418kb User : 任博
20060412183015974 Downloaded：0: on the Verilog HDL source code and testing procedures
Date : 2025-09-17 Size : 30kb User : 凌风
Exp05DCT Downloaded：0: DSP This is the DCT to the ccs compiled by
Date : 2025-09-17 Size : 52kb User : 朱敬锋
GPS_C_Code Downloaded：0: GPS navigation message and code generator simulation C/A code
Date : 2025-09-17 Size : 1kb User : wuhao
Exp06Correlation Downloaded：0: This is the preparation of the DSP from the relevant procedures in order to compile used ccs
Date : 2025-09-17 Size : 45kb User : 朱敬锋
CA-vfdl Downloaded：0: GPS C/A code generator LFSR VHDL source code
Date : 2025-09-17 Size : 1kb User : wuhao
5-2-2ModelSim Downloaded：0: MODELSIM environment Verilog source code, the entire increase functionality
Date : 2025-09-17 Size : 13kb User : wuhao
5-2-2Syn Downloaded：0: synplify environment to achieve full functionality increases
Date : 2025-09-17 Size : 7kb User : wuhao
5-3-10_ModelSim Downloaded：0: integrated simulation programs, including the All-Canadian, decoding, filtering and other functions Verilog language
Date : 2025-09-17 Size : 30kb User : wuhao

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