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use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions.
Date : 2025-09-18 Size : 5kb User : 刘吉

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The slave end program of I2C is used to respond to the master terminal and communicate -the slave I2C software, in response to the master terminal, and communications
Date : 2025-09-18 Size : 30kb User : 刘吉

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serial communication program. The baud rate for the 9600 serial communication program
Date : 2025-09-18 Size : 12kb User : 刘吉

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ATMEL Corporation AT89S52 simulated dual serial data acquisition in the application
Date : 2025-09-18 Size : 2kb User : liu

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the gui Linux Installation scripts, including the QTE and Qtopia. Please put the contents of the script corresponding development kits, such as the x86 version, use qvfb simulation framebuffer.
Date : 2025-09-18 Size : 1kb User : 田丰

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NIOSII nuclear FPGA within the parallel port, serial port initialization and Development
Date : 2025-09-18 Size : 2kb User : liu

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Serial communication routines, including the serial various operational packaging and a routine.
Date : 2025-09-18 Size : 162kb User : 田丰

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in the application of low-grade ARM's development process data collection
Date : 2025-09-18 Size : 2kb User : liu

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minigui1.3.3 the HHARM2410-R3 touch screen driven some issues, Then the modified source-driven, direct coverage of the original documents.
Date : 2025-09-18 Size : 2kb User : 田丰

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some some some some some some some
Date : 2025-09-18 Size : 49kb User : 于凤新

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file is a digital clock FPGA development, including the sub-clock fight, spare
Date : 2025-09-18 Size : 1kb User : liu

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note of the document they simply/cpld How Data Interface and the examples of urat
Date : 2025-09-18 Size : 3kb User : liu
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