Embeded-SCM Develop List Page 31925

Embeded-SCM Develop list

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rtl8019_vxworks Downloaded：0: is vxworks chip card under the RTL8019 driver, in S3C44B0 under operational.
Date : 2025-09-20 Size : 18kb User : 黄文
CLOCK_n1 Downloaded：0: Em78p447 four-digit LED DISPLAY time, the cumulative/countdown/alarm/clock /
Date : 2025-09-20 Size : 5kb User : 吴盛忠
Dimmer_code Downloaded：0: AT89C2051 simulation PT2262, 3M Oscillator, reliable experimental
Date : 2025-09-20 Size : 2kb User : 谭小牛
RS232-CAN Downloaded：0: with Freescale's 8-bit MCU do RS232-CAN communication switch plate. Includes firmware procedures, drawings, PCB map and a note.
Date : 2025-09-20 Size : 134kb User : 石头
SINE_SIGNAL_generator_base_on_Single_Chip_Micyoco. Downloaded：1: to SPCE061A (Single Chip Micyoco) at the core, DDS technology through the design of an arbitrary value of Step-conditioned multi-purpose signal source. The signal source in a KHz- 10MHz range stability can be adjustable
Date : 2025-09-20 Size : 508kb User : 陈朋
binary2bcd Downloaded：0: This build is for developing a "binary-to- BCD "converter for use in// displaying numeral 's in base-10 so that people can read and interpre not the// numbers more readily than they could if t he numbers were displayed i
Date : 2025-09-20 Size : 41kb User : 陈朋
DaFilter Downloaded：0: /* This program generates the DApkg.vhd fi le that is used to define the DA* filter core and g ives its parameters and the contents of the Dis* tributed Arithmetic Look-up-table "DALUT" ac cording to the DA algorithm
Date : 2025-09-20 Size : 15kb User : 陈朋
DCT_vhdl Downloaded：0: IDCT-M is a medium speed 1D IDCT core-- it ca n accept a continuous stream of 12-bit input word 's at a rate of-- 1 bit/ck cycle, operating at 50MHz speed, it can process MP @ ML MPEG video-- the core is 100 % synthesiza
Date : 2025-09-20 Size : 10kb User : 陈朋
Shifters_vhdl Downloaded：0: -- Title : Barrel Shifter (Pure combinational)-- This VH DL design file is an open design you can redistri bute it and/or-- modify it and/or implement it a fter contacting the author-- You can check the d raft license at
Date : 2025-09-20 Size : 2kb User : 陈朋
cf_interleaver2 Downloaded：0: interleaver that interleaver, which contains C, VHDL, VRILOG HDL three languages to write the interleaver, including a variety of combinations to depend species, a detailed description, is a rare study of the materials a
Date : 2025-09-20 Size : 352kb User : 陈朋
mdct.tar Downloaded：0: This April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete
Date : 2025-09-20 Size : 1.69mb User : 陈朋
fpu_v18 Downloaded：0: fpupack.vhdpre_norm_addsub.vhdaddsub_28.vhdpost_norm_addsub.vhdpre_norm_mul.vhdmul_24.vhdvcom serial_mul.vhdpost_norm_mul.vhdpre_norm_div.vhdserial_div.vhdpost_norm_div.vhdpre_norm_sqrt.vhdsqrt
Date : 2025-09-20 Size : 466kb User : 陈朋

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