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[Software Engineering] cpudesign

Description: Risc 32位CPU设计方法，由牛人主讲，可以好好学习-Risc 32 Wei CPU design methodology, from the cattle were speakers, you can learn
Platform: | Size: 292864 | Author: 孟天 | Hits:

[Embeded-SCM Develop] Guide-to-RISC-Processors-For-Programmers-and-Engi

Description: Sivarama P. Dandamudi Guide to RISC Processors for Programmers and Engineers
Platform: | Size: 1095680 | Author: moatasem momtaz | Hits:

[Other] MANIK

Description: MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed below. Features Hardware Features • Data Path Width 32 bits, with Four stage pipeline. • Mixed 16/32 bit instructions for code density • Von Neumann Architecture (Data and Instruction in the same address space). • Sixteen, 32 bit General Purpose Registers. • Four USER defined instructions (with Register File Write back capability).-MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed below. Features Hardware Features • Data Path Width 32 bits, with Four stage pipeline. • Mixed 16/32 bit instructions for code density • Von Neumann Architecture (Data and Instruction in the same address space). • Sixteen, 32 bit General Purpose Registers. • Four USER defined instructions (with Register File Write back capability).
Platform: | Size: 3395584 | Author: hfayed | Hits:

[VHDL-FPGA-Verilog] 8bit_RISC_CPU_RTL_Code

Description: 8位RISC CPU 内核源码(VERILOG版)-8 bit RSIC CPU RTL code(Verilog)
Platform: | Size: 79872 | Author: 曾亮 | Hits:

[VHDL-FPGA-Verilog] 8bitRISCCPU

Description: 8bit RISC cpu 设计资料包含夏宇闻老师的教程第8章-8bit RISC cpu design
Platform: | Size: 816128 | Author: dyfdown | Hits:

[MPI] RISC32bitwithVHDL

Description: 一个VHDL写的32位RISC程序，比较适合作为修改指令用。-32bit RISC design with VHDL language.
Platform: | Size: 20480 | Author: DYP | Hits:

[Windows Develop] mipscpu-source

Description: mips cpu的实现.MIPS是世界上很流行的一种RISC处理器。MIPS公司的R系列就是在此基础上开发的RISC工业产品的微处理器。这些系列产品为很多计算机公司采用构成各种工作站和计算机系统。 -mips cpu implementation. MIPS is the world' s very popular as a RISC processor. MIPS company' s R series is based on the development of industrial products RISC microprocessor. These series of products for many computer companies used to create various workstations and computer systems.
Platform: | Size: 7025664 | Author: 汤龑鸣 | Hits:

[VHDL-FPGA-Verilog] risc1200

Description: risc cpu设计源码，全部资料欢迎下载-risc cpu core
Platform: | Size: 989184 | Author: yzhang | Hits:

[VHDL-FPGA-Verilog] alu

Description: this is source code in verilog for arithmatic logic unit for RISC cpu
Platform: | Size: 63488 | Author: Harshit B J | Hits:

[VHDL-FPGA-Verilog] RISCcpu

Description: this verilog model of RISC CPU-this is verilog model of RISC CPU
Platform: | Size: 141312 | Author: Harshit B J | Hits:

[VHDL-FPGA-Verilog] risc_cup

Description: 精简指令集CPU的VERILOG语言实现，很有用-RISC CPU the VERILOG language, very useful
Platform: | Size: 474112 | Author: 侯勇 | Hits:

[SCM] RISCMCU_Thesis

Description: thesis of risc processor
Platform: | Size: 485376 | Author: vijaymohan | Hits:

[ARM-PowerPC-ColdFire-MIPS] 32-RISC

Description: 32位RI SC微处理器中分支预测器的硬件实现关键词：分支预测；超标量；分支历史-Hardware implementation of branch predictor in 32 bit RISC microprocessor
Platform: | Size: 295936 | Author: 刘全 | Hits:

[VHDL-FPGA-Verilog] zxcpu

Description: 用VHDL语言设计了一个含10条指令的RISC处理器。假定主存可以在一个始终周期内完成依次读写操作且和CPU同步，系统使用一个主存单元。处理器指令字长16位，包含8个通用寄存器，1个16位的指令寄存器和一个16位的程序记数器。处理器的地址总线宽度16位。数据总线宽度16位，取指和数据访问均在一跳蝻数据总线。处理器支持包含LDA，STA，MOV，MVI，ADD，SUB，AND，OR，JZ，JMP十条指令。其中仅有LDA和STA是访存指令。-VHDL language design with a RISC processor with 10 instruction. Assume that main memory can be completed in one cycle is always followed and the CPU read and write operations and the synchronization system uses a main memory unit. 16-bit instruction word processor, including 8 general purpose registers, a 16-bit instruction register and a 16-bit program counter. Processor' s address bus width 16 bits. 16-bit data bus width, fetch and data access are in the hop hoppers data bus. Processor support includes LDA, STA, MOV, MVI, ADD, SUB, AND, OR, JZ, JMP ten instructions. LDA and STA is the only one memory access instructions.
Platform: | Size: 1076224 | Author: zhaoshu | Hits:

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[Software Engineering] cpudesign

[Embeded-SCM Develop] Guide-to-RISC-Processors-For-Programmers-and-Engi

[Other] MANIK

[VHDL-FPGA-Verilog] 8bit_RISC_CPU_RTL_Code

[VHDL-FPGA-Verilog] 8bitRISCCPU

[MPI] RISC32bitwithVHDL

[Windows Develop] mipscpu-source

[VHDL-FPGA-Verilog] risc1200

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] RISCcpu

[VHDL-FPGA-Verilog] risc_cup

[SCM] RISCMCU_Thesis

[ARM-PowerPC-ColdFire-MIPS] 32-RISC

[VHDL-FPGA-Verilog] zxcpu

[VHDL-FPGA-Verilog] A-RISC-Design

[Linux-Unix] btcx-risc

[ARM-PowerPC-ColdFire-MIPS] 32-bit-RISC-CPU-ARM

[VHDL-FPGA-Verilog] RISC_cpu

[ARM-PowerPC-ColdFire-MIPS] Springer.Guide-to-RISC-Processors--for-Programmer

[VHDL-FPGA-Verilog] risc-processor

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