Welcome!
[Sign In]
!
[Sign Up]
!
Front-page it
|
Collect it
| [
中国-简体中文
]
CodeBus
codebus.net
Hot search:
Source
embeded
web
remote control
p2p
game
More...
FAQ
Fav
Home
SourceCode
Web Code
Develop Tools
Document
E-Books
Other Resource
Get Coins
Member
Location:
Downloads
SourceCode
Embeded-SCM Develop
VHDL-FPGA-Verilog
Title:
CONVOLUTIONAL_INTERLEAVER
Download
Category:
VHDL-FPGA-Verilog
Tags:
[VHDL]
[源码]
File Size:
1kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
sunmingang
Description:
DVB data interleaving, interleaving depth I = 12, has been applied!
Downloaders recently:
[
More information of uploader sunmingang
]
To Search:
interleaving
dvb-t
VHDL DVB
[
RS
] - oriented RS convolutional codes interlea
[
RSOriginal
] - Reed-Solomon channel coding are widely u
[
802.11aOFDMPHYcodingandinterleaving
] - IEEE 802.11a OFDM PHY coding and interle
[
convcode_interleaving
] - An implementation of 213 convlution code
[
DVB
] - DVB system, the reconciliation Interleav
[
RS_ENCODER
] - DVBC RS encoder
[
RANDOMIZATION
] - DVB data randomization procedures, stand
[
SYMBOL_MAPPING
] - DVB QAM symbol mapping! Has been applied
[
TS_CHANNEL_656
] - ITU656 interface transfer data streams u
[
asi_framesync
] - Be found in TS stream from the serial sy
File list
(Check if you may need any files):
CONVOLUTIONAL_INTERLEAVER.v
Main Category
SourceCode
Web Code
Develop Tools
Document
Other resource
Category
About site
Total codes:
120
M
Total size:
1500
GB
Today updated:368
Members:1688565
Today members:634
Total members:198568
Downloaded:1200M
Sign UP
Help
Support
What's CodeBus
SiteMap
Contact us
CodeBus www.codebus.net
“CodeBus” is the largest source code store in internet!
1999-2018
CodeBus
All Rights Reserved.