Description: module lcd_driver(clk,rst,LCD_DATA,RS,RW,EN)
input clk,rst //rst is the signal of reset,active low(0).
output RS,RW,EN //RS=0 时为写指令；RS=1 时为写数据
//RW=0 时对 LCD 模块执行写操作；
//RW=1 时对 LCD 模块执行读操作
//EN 为 LCD 模块的使能信号（下降沿触发）
output[7:0] LCD_DATA // LCD_DATA is the data ports
reg RS,rw_int,en_int
reg[7:0] LCD_DATA,count
reg[127:0] first_line_buff,second_line_buff //液晶显示的数据缓存
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File list (Check if you may need any files):
LCD\clockdiv.v
...\db\lcd.asm.qmsg
...\..\lcd.asm_labs.ddb
...\..\lcd.cbx.xml
...\..\lcd.cmp.bpm
...\..\lcd.cmp.cdb
...\..\lcd.cmp.ecobp
...\..\lcd.cmp.hdb
...\..\lcd.cmp.logdb
...\..\lcd.cmp.rdb
...\..\lcd.cmp.tdb
...\..\lcd.cmp0.ddb
...\..\lcd.cmp2.ddb
...\..\lcd.cmp_bb.cdb
...\..\lcd.cmp_bb.hdb
...\..\lcd.cmp_bb.logdb
...\..\lcd.cmp_bb.rcf
...\..\lcd.dbp
...\..\lcd.db_info
...\..\lcd.eco.cdb
...\..\lcd.fit.qmsg
...\..\lcd.hier_info
...\..\lcd.hif
...\..\lcd.map.bpm
...\..\lcd.map.cdb
...\..\lcd.map.ecobp
...\..\lcd.map.hdb
...\..\lcd.map.logdb
...\..\lcd.map.qmsg
...\..\lcd.map_bb.cdb
...\..\lcd.map_bb.hdb
...\..\lcd.map_bb.logdb
...\..\lcd.pre_map.cdb
...\..\lcd.pre_map.hdb
...\..\lcd.psp
...\..\lcd.pss
...\..\lcd.rtlv.hdb
...\..\lcd.rtlv_sg.cdb
...\..\lcd.rtlv_sg_swap.cdb
...\..\lcd.sgdiff.cdb
...\..\lcd.sgdiff.hdb
...\..\lcd.signalprobe.cdb
...\..\lcd.sld_design_entry.sci
...\..\lcd.sld_design_entry_dsc.sci
...\..\lcd.smp_dump.txt
...\..\lcd.syn_hier_info
...\..\lcd.tan.qmsg
...\..\lcd.tis_db_list.ddb
...\..\prev_cmp_lcd.asm.qmsg
...\..\prev_cmp_lcd.fit.qmsg
...\..\prev_cmp_lcd.map.qmsg
...\..\prev_cmp_lcd.qmsg
...\..\prev_cmp_lcd.tan.qmsg
...\lcd.asm.rpt
...\lcd.done
...\lcd.dpf
...\lcd.fit.rpt
...\lcd.fit.smsg
...\lcd.fit.summary
...\lcd.flow.rpt
...\lcd.map.rpt
...\lcd.map.summary
...\lcd.pin
...\lcd.pof
...\lcd.qpf
...\lcd.qsf
...\lcd.qws
...\lcd.sof
...\lcd.tan.rpt
...\lcd.tan.summary
...\lcd.v
...\lcd_driver.v
...\lcd_driver.v.bak
...\db
LCD
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