hssdrc_latest.tar HSSDRC IP core is the configurab

Title: hssdrc_latest.tar

Category:
VHDL-FPGA-Verilog
Tags:
[Linux] [C/C++] [源码]
File Size:
415kb
Update:
2012-11-26
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Uploaded by:
Arun

Description: HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is licensed under MIT License

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