Description: VHDL code miniUART to achieve sub-module design and state machine design, super small kernel
- [FIR_Filter_Design] - classical algorithm matlab source, FIR f
- [examples] - PMatlab rewritten using BPSK and QPSK th
- [MzLH0112864] - MzLH01-12864 Module Programming Guide v1
- [clk_div5] - Arbitrary always precise frequency of 5
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