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Description: Xilinx可编程逻辑器件的高级应用与设计技巧
全面介绍Xilinx的CoolRunnerII Spartan-3 Virtex-II VirtexII pro等器件的结构特性,以及ISE6及其辅助设计工具。 -Xilinx programmable logic devices and design techniques for advanced applications a comprehensive introduction to Xilinx s CoolRunnerII Spartan-3 Virtex-II VirtexII pro, such as the structural characteristics of the device, as well as its ISE6-aided design tools.
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Size: 41021440 |
Author: 胡赟星 |
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Description: to generate keygen for xilinx family ise edk
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Size: 1024 |
Author: malik |
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Description: 关于XILINX FPGA
内部
中文培训教材-XILINX FPGA on internal training materials in Chinese
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Size: 1771520 |
Author: luxh |
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Description: Xilinx FPGA Design Tutorial
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Size: 1687552 |
Author: kajal |
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Description: 周志伟 FPGA设计高级技巧Xilinx篇
华为公司-ZHOU Zhi-wei senior FPGA design skills Huawei Xilinx Part
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Size: 1705984 |
Author: 刘佳扬 |
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Description: VHDL的经典经验。相当的不错,一个多年开发FPGA的工程师自己的记录,适用于ALTERA,XILINX,LATTICE等FPGA的开发。希望对大家有用。-VHDL-xilinx-fpga-altera VHDL-xilinx-fpga-altera VHDL-xilinx-fpga-altera VHDL-xilinx-fpga-altera VHDL-xilinx-fpga-altera
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Size: 3913728 |
Author: 何思涵 |
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Description: Xilinx时序约束培训教材,对于时序仿真有很好的指导意义-Training materials Xilinx timing constraints, timing simulation for a very good guide
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Size: 687104 |
Author: zhangchen |
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Description: 基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
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Size: 3090432 |
Author: 胡文静 |
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Description: Advanced Xilinx FPGA
Design with ISE
Objectives
Describe Virtex™ -II advanced architectural features and how they can be used to
improve performance
• Create and integrate cores into your design flow using the CORE Generator™ System
• Describe the different ISE options available and how they can be used to improve
performance
• Describe a flow for obtaining timing closure with Advance Timing Constraints
• Use FloorPlanner to improve timing
• Reduce implementation time with Incremental Design Techniques and Modular Design
Techniques
• Reduce debugging time with FPGA Editor
• On-Chip Verification with ChipScope Pro-Advanced Xilinx FPGA
Design with ISE
Objectives
Describe Virtex™ -II advanced architectural features and how they can be used to
improve performance
• Create and integrate cores into your design flow using the CORE Generator™ System
• Describe the different ISE options available and how they can be used to improve
performance
• Describe a flow for obtaining timing closure with Advance Timing Constraints
• Use FloorPlanner to improve timing
• Reduce implementation time with Incremental Design Techniques and Modular Design
Techniques
• Reduce debugging time with FPGA Editor
• On-Chip Verification with ChipScope Pro
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Size: 10615808 |
Author: rakesh |
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Description: xilinx中文培训材料,非常好的FPGA学习资料-xilinx Chinese language training materials, a very good learning materials FPGA
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Size: 3704832 |
Author: 小金 |
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Description: Xilinx sparten3E 键盘和开发板的通信和LCD的字符显示-Xilinx sparten3E LCD
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Size: 3072 |
Author: no4 |
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Description: XILINX的FPGA芯片架构剖析
powerpc-fpga xilinx
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Size: 70656 |
Author: |
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Description: 非常详细的介绍了ISE软件的使用,以及如何生成可烧录文件,如何将烧录文件下载到Xilinx开发板,非常傻瓜式的操作。-Very detailed description of the ISE software to use, and how to generate a recordable document, how to burn files downloaded to the Xilinx development board, a very fool-operation.
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Size: 2613248 |
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Description: 深入详解xilinx fpga结构,是初学者学习xilinx fpga的好工具-Detailed xilinx fpga-depth structure for beginners to learn is a good tool for xilinx fpga
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Size: 1705984 |
Author: 刘一平 |
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Description: 上载一篇:FPGA设计高级技巧Xilinx篇,希望对大家有点用。-Upload a: FPGA design tips for Xilinx articles, we hope to some use.
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Size: 1705984 |
Author: 求学 |
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Description: Modelsim 10.0a 中建立 Xilinx ISE 13.1的仿真库及其之间调用设置详解。-Modelsim 10.0a create Xilinx 13.1 calls between the simulation library and its setting Detailed.
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Size: 478208 |
Author: 迷失De信仰 |
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Description: 潜力逐项研究Altera、Xilinx、Lattice的USB下载线。最终希望做成“开源的Altera、Xilinx、Lattice三合一的USB下载线”。填补国内的空白,以及为电子爱好者提供廉价的开发工具。-3 to 1 Altera、Xilinx、Lattice USB blaster
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Size: 852992 |
Author: 车万方 |
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Description: xilinx edk官方实验1--6,英文版-xilinx edk lab1--lab6,English
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Size: 2646016 |
Author: 吴忠琴 |
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Description: Xilinx-CPLD开发板CPLD开发套件说明书-Xilinx-CPLD development board CPLD Development Kit manual
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Size: 1433600 |
Author: huguangzhou |
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Description: Xilinx时序约束培训教材,教你怎样设计时序收敛的FPGA程序。
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Size: 1259912 |
Author: gxb2525775 |
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