Description: 16-bit数的偶数奇偶校验及阶乘运算,用verilog写-16-bit number of even parity and factorial computation, written using Verilog Platform: |
Size: 1024 |
Author:杨艳 |
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Description: 用Verilog HDL写的数字时钟,已经在开发板上验证过的,绝对原创,使用数码管进行显示!-Written using Verilog HDL Digital Clock, has been verified in the development of on-board absolute originality, the use of digital tube display! Platform: |
Size: 2048 |
Author:吴俊泉 |
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Description: 用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行-Written using Verilog 4* 4 keypad keys detection procedures. The project has been compiled. Directly in the development of Atera DE1 Fpga board run Platform: |
Size: 1594368 |
Author:王乔 |
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Description: 用verilog写的串并转换程序,希望对大家有用!-Written using Verilog string and the conversion process, in the hope that useful to everybody! Platform: |
Size: 1024 |
Author:janew |
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Description: mcu与cpld之间spi接口程序,mcu为master,cpld用verilog写成slave模块-mcu with spi interface program between the CPLD, mcu for the master, cpld written using Verilog slave module Platform: |
Size: 110592 |
Author:叶灿 |
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Description: 组成原理的大作业,写一个计算器,用verilog语言写的-The composition of the major principles of operation, write a calculator, using the language written in Verilog Platform: |
Size: 8943616 |
Author:陈江 |
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Description: STBC的硬件实现源代码,用Verilog语言写的-STBC hardware to achieve source code, written using Verilog language Platform: |
Size: 2048 |
Author:周金喜 |
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Description: 周立功的FPGA ARM 51的板子上的温度传感器,本样例基于FPGA用Verilog写的。-Ligong weeks of the FPGA ARM 51 temperature sensors on the board, the FPGA-based sample written using Verilog. Platform: |
Size: 2048 |
Author:王祥以 |
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Description: 基于PS/2协议的鼠标驱动程序,用Verilog语言写成,可以用于任何型号的FPGA的驱动。-Based on PS/2 protocol mouse driver written using Verilog language can be used for any type of FPGA-driven. Platform: |
Size: 1024 |
Author:wendy |
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Description: 一些用verilog编写的小程序,有全加器,计数器,比较器VGA显示,键盘扫描等-Some small programs written using verilog have full adder, counter, comparator VGA display, keyboard scanning, etc. Platform: |
Size: 8904704 |
Author:于苏 |
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Description: 一个用Verilog写的DDR2的控制器(我们项目是在Altera的FPGA)成功仿真,并且使用到了项目中控制DDR2-A written using Verilog DDR2 controller (our project in Altera' s FPGA) successful simulation, and used to control the DDR2 in project Platform: |
Size: 10875904 |
Author:左洪成 |
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Description: 利用IP Core编写的Verilog程序,实现FFT变换,希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help. Platform: |
Size: 99328 |
Author:chengyungang |
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Description:
This file with the wavelet transf
Mallat implementation of wavelet
Verilog hdl code modules for radi
Modelsim 6.6 crack, can be used f
A written using Verilog DDR2 cont
Simple CPU VHDL implementation an
Dual-port RAM design, using Veril
Verilog language, a hardware-base
FPGA embedded project combat, Man
Application FPGA, FPGA-chip hardw
Mallat implementation of wavelet
Layer of one-dimensional wavelet Platform: |
Size: 1852416 |
Author:sansfroid |
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Description: 148个用verilog编写的小程序,易于初学者学习,部分代码还有testbench-148 small programs written using verilog, easy for beginners to learn, there are some code testbench Platform: |
Size: 37888 |
Author:宋利川 |
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