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[Other resourceSOVA

Description: 这是log-map或者说是软输出维特比算法的一个实现。-This is the log-map or the soft output Viterbi Algorithm in a realization.
Platform: | Size: 7944 | Author: 逄玉叶 | Hits:

[ELanguageturbo_VHDL

Description: Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * MyHDL cycle/bit accurate model * Synthesizable VHDL model -Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * M yHDL cycle / bit accurate model * Synthesizable VHDL model
Platform: | Size: 154770 | Author: 鲁京 | Hits:

[OtherdecSOVA

Description: 本程序是采用维特比算法的软输入软输出的仿真程序-this procedure is used Viterbi Algorithm soft-input soft-output of the simulation program
Platform: | Size: 3332 | Author: cqj | Hits:

[Other resourcesovadec

Description: Soft Input Soft Output Viterbi Algorithm
Platform: | Size: 3335 | Author: 董鹏 | Hits:

[Software EngineeringsovaIntroduce

Description: 该文章介绍了VITERBI译码软输入软输出(SISO)的算法及实现-The article introduces the VITERBI decoding soft-input soft-output (SISO) algorithm and implementation
Platform: | Size: 1098326 | Author: dina | Hits:

[Education soft systemSOVA

Description: 这是log-map或者说是软输出维特比算法的一个实现。-This is the log-map or the soft output Viterbi Algorithm in a realization.
Platform: | Size: 7168 | Author: 逄玉叶 | Hits:

[Communication-Mobileturbo_VHDL

Description: Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * MyHDL cycle/bit accurate model * Synthesizable VHDL model -Turbo Decoder Release 0.3* Double binary, DVB-RCS code* Soft Output Viterbi Algorithm* M yHDL cycle/bit accurate model* Synthesizable VHDL model
Platform: | Size: 154624 | Author: | Hits:

[OtherdecSOVA

Description: 本程序是采用维特比算法的软输入软输出的仿真程序-this procedure is used Viterbi Algorithm soft-input soft-output of the simulation program
Platform: | Size: 3072 | Author: cqj | Hits:

[Communication-Mobiledeconvgaijin

Description: 卷积码译码算法改进 实现Conv.(2,1,9)的编码、软判决滑动窗维特比译码,其生成多项式为G0=561(八进制),G1=753(八进制),调制方式为BPSK,信道为AWGN,比较不同的译码深度对译码器性能的影响-convolutional code decoding algorithm to improve achievement Conv. (2,1,9) of the Code, Soft Decision sliding window Viterbi Decoder, generating polynomial for the G0 = 561 (octal), G1 = 753 (octal), for BPSK modulation mode, channel for AWGN, compare different depth of decoding decoder performance of
Platform: | Size: 47104 | Author: 李春晖 | Hits:

[matlabsovadec

Description: Soft Input Soft Output Viterbi Algorithm
Platform: | Size: 3072 | Author: 董鹏 | Hits:

[Communication-MobilesovaIntroduce

Description: 该文章介绍了VITERBI译码软输入软输出(SISO)的算法及实现-The article introduces the VITERBI decoding soft-input soft-output (SISO) algorithm and implementation
Platform: | Size: 1097728 | Author: dina | Hits:

[Otherviterbi-SOVA

Description: 软输出维特比译码算法的C语言详细实现,程序效率高,比MATLAB快多了.-Soft-output Viterbi algorithm realize the C language in detail, procedures efficient and quicker than MATLAB.
Platform: | Size: 5120 | Author: 李华 | Hits:

[Communication-Mobileconvolutiondecode

Description: % decode with soft-input viterbi algorithm 硬判决 % //k=4,r=1/2 %输入数据为软信息,并且数据为均值为1的BPSK调制,如果均值为MEAN,那么62,63,103,104行应做相应修改- Decode with soft-input viterbi algorithm hard-decision// k = 4, r = 1/2 input data for the soft information and data for the average one of BPSK modulation, if the average for the MEAN, then the line should 62,63103104 make consequential amendments to
Platform: | Size: 2048 | Author: 陈富龙 | Hits:

[Communication-MobileGSM_Viterbi_soft-detection

Description: 在GSM通信系统中,Viterbi检测是一个及其重要的部分,许多的研究人员在这里花费了大量的心血。参考各种资料,我们总结得出以下Viterbi软输出算法,与传统的硬判决方法相比,可以提高2~3个db的增益:-In GSM communication systems, Viterbi detection is an important part of many researchers here spent a lot of effort. Reference to a variety of information, we summarize the following soft-output Viterbi algorithm, with the traditional hard-decision method, can be raised by 2 ~ 3 db gain:
Platform: | Size: 2048 | Author: 戴浩 | Hits:

[Communication-Mobilesova0

Description: SOVA Soft out put viterbi Algorithm
Platform: | Size: 1024 | Author: Imran | Hits:

[Streaming Mpeg4H264AVCDecoderLibTestStatic

Description: Simulation of Turbo Encoding and Decoding" A randomly generated information bits are encoded with Turbo Encoder (which uses two RSC Encoders in parallel along with an interleaver) and added with AWG Noise then decoded with Turbo Decoder (Soft Output Viterbi Algorithm). We have understood/used TI TMS320C55x Processor and its assembly instruction set.
Platform: | Size: 291840 | Author: satya | Hits:

[Communication-Mobilesoft_and_hard_decision_on_viterbi_decoder

Description: With using noisy data and created data, soft and hard decision are made by viterbi decoder
Platform: | Size: 8192 | Author: Cagdas | Hits:

[Communication-Mobilesoft_input_soft_output_Viterbi

Description: SOVADEC is an implementation of the soft input soft output Viterbi algorithm. The algorithm can be called using DEC = SOVADEC( MSG, LLR, TRELLIS, WIN )-SOVADEC is an implementation of the soft input soft output Viterbi algorithm. The algorithm can be called using DEC = SOVADEC (MSG, LLR, TRELLIS, WIN)
Platform: | Size: 3072 | Author: aeou607 | Hits:

[Algorithmsova0

Description: This function implememts Soft Output Viterbi Algorithm in trace back mode Input: rec_s: scaled received bits. rec_s(k) = 0.5 * L_c(k) * y(k) L_c = 4 * a * Es/No, reliability value of the channel y: received bits g: encoder generator matrix in binary form, g(1,:) for feedback, g(2,:) for feedforward L_a: a priori information about the info. bits. Extrinsic info. from the previous component decoder ind_dec: index of the component decoder. =1: component decoder 1 The trellis is terminated to all zero state =2: component decoder 2 The trellis is not perfectly terminated. Output: L_all: log ( P(x=1|y) ) / ( P(x=-1|y) ) Frame size, info. + tail bits- This function implememts Soft Output Viterbi Algorithm in trace back mode Input: rec_s: scaled received bits. rec_s(k) = 0.5 * L_c(k) * y(k) L_c = 4 * a * Es/No, reliability value of the channel y: received bits g: encoder generator matrix in binary form, g(1,:) for feedback, g(2,:) for feedforward L_a: a priori information about the info. bits. Extrinsic info. from the previous component decoder ind_dec: index of the component decoder. =1: component decoder 1 The trellis is terminated to all zero state =2: component decoder 2 The trellis is not perfectly terminated. Output: L_all: log ( P(x=1|y) ) / ( P(x=-1|y) ) Frame size, info. + tail bits
Platform: | Size: 1024 | Author: yk | Hits:

[Graph Recognizesopt-soft

Description: 本程序是采用维特比算法的软输入软输出的仿真程序(This procedure is to use soft input soft output of viterbi algorithm simulation program)
Platform: | Size: 3072 | Author: Jhmes | Hits:
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