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[ARM-PowerPC-ColdFire-MIPS] 第1章－SD卡读写模块

Description: 第1章－SD卡读写模块 1. sdconfig.h: 该文件为SD卡读写模块配置头文件，用户可根据实际硬件条件进行修改. 2. SD目录 : SD卡读写模块的全部文件,一般不用修改. 3. 建议sdconfig.h文件不要放于SD目录中，因为SD目录中的文件一般无须修改,sdconfig.h通常会有改动. 4. 例子见上一级目录的SDExample目录.-Chapter 1-SD Card Reader module 1. Sdconfig.h : This document SD Card Reader module configuration files, users can be based on actual hardware changes. 2. SD Contents : SD Card Reader module all documents, generally need not be amended. 3. Recommendations sdconfig.h documents will not put SD directory because the directory SD generally no need to amend the document, sdconfig.h usually subject to change. 4. See above examples SDExample a directory of directories.
Platform: | Size: 168960 | Author: k14789 | Hits:

[VHDL-FPGA-Verilog] SDmmcfpgaconfig.tar

Description: MMC卡的VHDL源代码实现，经过大批量生产验证-MMC card VHDL source code to achieve, through large-scale production test
Platform: | Size: 5120 | Author: 喻袁洲 | Hits:

[SCM] SDcard_Driver

Description: SD卡的驱动程序，对于写这方面的驱动的来说有点参考。-SD card driver, it was driven by the terms a bit reference.
Platform: | Size: 15360 | Author: 陈木斌 | Hits:

[Other Embeded program] smartcard_vhdl

Description: SD卡读写的VHDL VHDL Source Files in Smartcard: Top.vhd - top level file smartcard.vhd conver2ascii.vhd binary2bcd.vhd lcd.vhd power_up.vhd-SD card reader of VHDLVHDL Source Files in Smartcard: Top.vhd- top level file smartcard.vhd conver2ascii.vhd binary2bcd.vhd lcd.vhd power_up.vhd
Platform: | Size: 420864 | Author: gbh | Hits:

[VHDL-FPGA-Verilog] FPGA-SD-COMMUNICATION

Description: 基于QUARTUSII软件 实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信 所用语言位verilog HDL-QUARTUSII software implementation based on FPGA (ATERA CYCLONE II series) with SD Card SD mode digital communication language verilog HDL
Platform: | Size: 5064704 | Author: chenbinjie | Hits:

[SCM] sd-spi

Description: SD卡切换到SPI模式的工作流程，必须遵守这个流程-SD card SPI mode switch to the work flow, we must comply with the flow
Platform: | Size: 1024 | Author: lsc | Hits:

[VHDL-FPGA-Verilog] SELLER

Description: 基于verilog HDL的自动售货机控制电路设计: 可以对5种不同种类的货物进行自动售货,价格分别为A=1.00,B=1.50,C=1.80,D=3.10,E=5.00 。售货机可以接受1元,5角,1角三种硬币(即有三种输入信号IY,IWJ,IYJ),并且在一个3位7段LED(二位代表元,一位代表角)显示以投入的总钱数，最大9.90元，如果大于该数值，新投入的硬币会退出,选择货物的输入信号Ia,Ib,Ic,Id,Ie和一个放弃信号In,输出指示信号为 Sa, Sb ,Sc ,Sd, Se 分别表示售出相应的货物,同时输出的信号yuan, jiao代表找零,相应每个脉冲代表找零相应的硬币，上述输入和输出信号均是一个固定宽度的脉冲信号。
Platform: | Size: 1024 | Author: chenyi | Hits:

[Other] sd_IP

Description: SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core. Good luck-SD card controller can just read data using 1 bit SD mode.I have written this core for NIOS2 CPU, Cyclone, but I think it can workswith other FPGA or CPLD. Better case for this core is SD clock = 20 MHz andCPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core.Good luck
Platform: | Size: 8192 | Author: tuya | Hits:

[Embeded-SCM Develop] sd+spi

Description: sd 的spi模式详细的中文资料，一位好心人翻译的-sd of the spi mode in detail the information the Chinese, a translation of well-wishers
Platform: | Size: 1821696 | Author: 黄天乐 | Hits:

[Windows Develop] SDIOCLK

Description: SDIO & SD spec上面所寫的做，每8個cycle讀一次，確定第一個bit是0，第二個bit是1，就接者讀剩下的46bit的CMD，讀完CMD，等 16cycle的空檔，再開始response，視CMD的不同，會有的response，回完response，就繼續等CMD。-SDIO
Platform: | Size: 3798016 | Author: wanlin su | Hits:

[VHDL-FPGA-Verilog] SD_Host_Model_513_02

Description: 可做SD的simulation model-SD can do the simulation model
Platform: | Size: 3828736 | Author: Arthur | Hits:

[VHDL-FPGA-Verilog] sd_reader

Description: SD卡读卡器模块的VHDL及软件驱动代码，可作为外设挂接在Avalon总线上。支持以SD模式、4线模式读取。在24MHz时钟驱动下读取速率可达8MByte/s-SD card reader module and software drivers VHDL code, can be articulated as a peripheral bus in Avalon. To support the SD model, 4-wire mode read. Driven by the 24MHz clock rate up to read 8MByte/s
Platform: | Size: 18432 | Author: ctqy | Hits:

[VHDL-FPGA-Verilog] SD_card_src

Description: 一个基于VHDL语言的8位SD卡读取程序。含有源代码和说明-VHDL language based on an 8-bit SD card reader. Containing the source code and description
Platform: | Size: 20480 | Author: 李超 | Hits:

[SCSI-ASPI] spi_Master

Description: 实现了对SD卡的SPI方式下读写操作，已经测试了，可以直接用-The realization of the SD card to read and write SPI operation mode has been tested, can be directly used
Platform: | Size: 2116608 | Author: 张立涛 | Hits:

[VHDL-FPGA-Verilog] SDCard_Controller

Description: SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口，方便与其他IP连接使用。 -SD Card Controller IP. Compatible with SD Card Agreement 2.0. With the wishbone bus interface to facilitate the use of other IP connections.
Platform: | Size: 24576 | Author: xiafei | Hits:

[VHDL-FPGA-Verilog] spimaster

Description: SPI IP core supporting SD/MMC
Platform: | Size: 2269184 | Author: zhanglh | Hits:

[Communication-Mobile] sdcard_mass_storage_controller

Description: A host controlled ot control sd cards
Platform: | Size: 2270208 | Author: Anand Krishna | Hits:

[Embeded-SCM Develop] Pelmanism.tar

Description: FPGA reading JPEG pictures from SD card
Platform: | Size: 4057088 | Author: lo | Hits:

[VHDL-FPGA-Verilog] sdcard_mass_storage_controller_latest..tar

Description: SD卡控制器，适合硬件工程师在FPGA内部实现SD 控制器-SD card controller FPGA for hardware engineers in the internal implementation of SD Controller
Platform: | Size: 2287616 | Author: 彭涛 | Hits:

[VHDL-FPGA-Verilog] SD-card-controller-used--FPGA

Description: SD卡控制器的FPGA实现 -SD card controller FPGA to achieve SD card controller FPGA implementation
Platform: | Size: 257024 | Author: liujie | Hits:
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