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[Other resource] 8倍频vhdl

Description: 该文件可用vhdl语言实现时钟8倍频，运行环境可在maxplus2和ise的仿真软件上-the document available VHDL Language 8 clock frequency, the operating environment and ideally maxplus2 simulation software
Platform: | Size: 998 | Author: 罗兵武 | Hits:

[Other resource] DISPLAY-vhdl

Description: vhdl描述的显示代码 maxplus2开发环境-VHDL description of the display code development environment maxplus2
Platform: | Size: 1137 | Author: 丁智罡 | Hits:

[Other resource] ERFREE_COUNTER-vhdl

Description: maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
Platform: | Size: 12646 | Author: 丁智罡 | Hits:

[Other resource] KEYBOARD_DEC-vhdl

Description: maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures
Platform: | Size: 1121 | Author: 丁智罡 | Hits:

[Other resource] SCAN-vhdl

Description: maxplus2为开发环境 vhdl编写的 扫描 程序-maxplus2 VHDL development environment for the preparation of a scanning program
Platform: | Size: 882 | Author: 丁智罡 | Hits:

[VHDL-FPGA-Verilog] 数字钟VHDL设计

Description: maxplus2开发基于EDA数字钟VHDL设计
Platform: | Size: 468777 | Author: ray494 | Hits:

[VHDL-FPGA-Verilog] VHDL_交通灯系统

Description: 用VHDL语言编写，在MAXPLUS2下调试通过-VHDL language, debug through MAXPLUS2
Platform: | Size: 114688 | Author: 自然风 | Hits:

[VHDL-FPGA-Verilog] DISPLAY-vhdl

Description: vhdl描述的显示代码 maxplus2开发环境-VHDL description of the display code development environment maxplus2
Platform: | Size: 1024 | Author: 丁智罡 | Hits:

[VHDL-FPGA-Verilog] ERFREE_COUNTER-vhdl

Description: maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
Platform: | Size: 12288 | Author: 丁智罡 | Hits:

[VHDL-FPGA-Verilog] KEYBOARD_DEC-vhdl

Description: maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures
Platform: | Size: 1024 | Author: 丁智罡 | Hits:

[VHDL-FPGA-Verilog] SCAN-vhdl

Description: maxplus2为开发环境 vhdl编写的 扫描 程序-maxplus2 VHDL development environment for the preparation of a scanning program
Platform: | Size: 1024 | Author: 丁智罡 | Hits:

[VHDL-FPGA-Verilog] FIR低通滤波器部分模块

Description: 一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.
Platform: | Size: 5120 | Author: 吴健宇 | Hits:

[VHDL-FPGA-Verilog] 8倍频vhdl

Description: 该文件可用vhdl语言实现时钟8倍频，运行环境可在maxplus2和ise的仿真软件上-the document available VHDL Language 8 clock frequency, the operating environment and ideally maxplus2 simulation software
Platform: | Size: 1024 | Author: 罗兵武 | Hits:

[VHDL-FPGA-Verilog] FIRvhdl

Description: 用vhdl实现一个fir滤波器 设计要求： 1．最小阻带衰减-30db。 2．带内波动小于1db． 3．用MATLIB与MAXPLUS2联合设计与仿真-use VHDL to achieve a fir filter design requirements : 1. The smallest stop band attenuation- 30dB. 2. With fluctuating within less than 1DB. 3. With MATLIB with MAXPLUS2 joint design and simulation
Platform: | Size: 3072 | Author: 达闻西 | Hits:

[VHDL-FPGA-Verilog] wodevhdl

Description: vhdl练习实例。在maxplus2中编写，编译通过，正确。-VHDL practice examples. In maxplus2 prepare, compile and correct.
Platform: | Size: 65536 | Author: 梦雨 | Hits:

[VHDL-FPGA-Verilog] EDAchuzuchejijia

Description: 在本示例程序中，用VHDL语言实现了出租车的记价功能，在Maxplus2环境下编写，可通过cpld下载板来验证程序。在压缩包中附有示例的目的，方法和仿真时序图，是学习VHDL好例子。-in this sample program, using VHDL of the entry price of a taxi function, in preparation FLEX10K environment, through cpld download plate to the verification process. The compression package with the purpose of example, the simulation methods and timing diagrams, is a good example to learn VHDL.
Platform: | Size: 339968 | Author: bkd | Hits:

[VHDL-FPGA-Verilog] vhdl_fifo

Description: 用vhdl编写的fifo队列.可以在maxplus2平台上使用.-using VHDL fifo prepared by the cohort. Maxplus2 platform can be used.
Platform: | Size: 309248 | Author: 蔡庆重 | Hits:

[VHDL-FPGA-Verilog] HXRJTD

Description: 这是本人在Max plus2环境下用VHDL语言编的交通灯控制程序。做EDA课程设计的朋友可以下来参考参考。-This is my Max plus2 environment with VHDL addendum to the traffic lights control procedures. EDA design courses so friends from the reference reference.
Platform: | Size: 754688 | Author: 健 | Hits:

[Other] con1

Description: maxplus2!!!!!!!!!!!!!!! 自动售货机 vhdl-vending machine VHDL maxplus2 !!!!!!!!!!!!!!!
Platform: | Size: 1024 | Author: yjk | Hits:

[Other] maxplus2

Description: 开发VHDL的工具，MAX+PLUSII 直接下载使用,-VHDL development tools, MAX+ PLUSII direct download,
Platform: | Size: 17325056 | Author: sunruili | Hits:
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