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Description: 用Verilog编写的CPU,附带指令集与实验报告
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Size: 363974 |
Author: surfing52 |
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Description: 8位RISC CPU的VERILOG编程 SOURCECODE-8 RISC CPU VERILOG programs SOURCECODE
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Size: 275456 |
Author: zfhustb |
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Description: 这是一个很好的Verilog 编写的8位RISC CPU源码(可做为MCU),并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code.
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Size: 78848 |
Author: 张念华 |
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Description: 用verilog编写在FLEX10K上实现的简易CPU-used in the preparation of Verilog FLEX10K achieve simple CPU
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Size: 25600 |
Author: 张桓铭 |
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Description: 这是一个Verilog HDL编写的RISC cpu的程序,该程序共10个子程序,实现了简单的RISC cpu,可供初学者参考,学习硬件描述语言,及设计方法。该程序通过了modelsim仿真验证。-This is the RISC cpu code which writed by Verilog HDL.This code has ten subprogram which
came true the simple RISC cpu. Beginner can reference this example to study the Hardware discription language and the design manner. This program have passed the Modelsim validate.
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Size: 44032 |
Author: 施向东 |
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Description: 這是用verilog寫的一個簡單的處理器,雖然只具有5個指令,但是可以透過這個範例,來了解到cpu的架構,與如何開發處理器,相信會有很大的啟發。-using Verilog This is a simple written by the processor, although with only five directives, through this example, to understand cpu architecture, how to develop processor, it would be very enlightening.
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Size: 33792 |
Author: 吳中億 |
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Description: RISC CPU的VerilogHDL描述-RISC CPU Verilog HDL description
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Size: 369664 |
Author: 陈俊 |
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Description: 这是arm7处理器的verilog全代码,仔细研究一下,会对CPU和verilog均有很大的裨益。-This is ARM7 processor Verilog-wide code carefully, CPU and Verilog will have great benefits.
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Size: 37888 |
Author: 王云 |
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Description: 精简指令cpu,用verilog编写,详细的教程-RISC cpu, using Verilog prepared and detailed tutorial
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Size: 215040 |
Author: 郑欲 |
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Description: Verilog实现的CPU程序,简单应用哈-Verilog realization of CPU process, simple application of Kazakhstan
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Size: 3072 |
Author: liu |
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Description: 初学cpu设计(完全教程)包括verilog代码以及文档说明那个-Beginner cpu design (complete tutorial) includes a Verilog code as well as the document explains that
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Size: 366592 |
Author: hjx |
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Description: 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG,一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式,采用Load/Store结构,ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算,并支持浮点数加、减、乘、除四种运算,支持与、或、异或、非4种逻辑运算,支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算,支持Load/Store操作,支持地址/立即数加载操作,支持无条件转移和为0转移、非0转移、无符号>转移、无符号<转移、有符号>转移、有符号<转移等条件转移。
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Size: 43008 |
Author: haotianr |
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Description: 以前在学校里的课程设计,使用verilog编写的一个CPU程序,可以下板子-Ago in the school curriculum design, the use of Verilog CPU prepare a procedure under the board
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Size: 6144 |
Author: 熊浩 |
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Description: verilog实现的八位CPU,包括乘法、除法以及多种寻址方式。代码中包括测试模块,可以直接在试验箱上运行。-verilog to achieve the eight CPU, including multiplication, division, as well as addressing a variety of ways. Code, including test modules, can be run directly in the chamber.
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Size: 8192 |
Author: 鲁迪 |
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Description: verilog实现的一个简单的CPU,大家可下载去瞅瞅啊-verilog to achieve a simple CPU, you can download to Chou Chou ah
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Size: 5705728 |
Author: zhangrongfei |
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Description: verilog编写的简单的CPU,用于参考,已经过仿真-verilog prepared by a simple CPU, for reference, has been simulation
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Size: 4096 |
Author: 于水洋 |
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Description: verilog编写CPU:
1. 哈佛存储器结构,大端格式;
2. 类MIPS精简指令集,支持子程序调用和软中断;
3. 实现了乘除法;
4. 五级流水线,工作频率可达80MHz(每个时钟周期一条指令,不计流水线冲突)。 -MIPS like CPU using verilog
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Size: 17408 |
Author: yk |
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Description: 一个完整的流水CPU设计,quartus平台,Verilog实现-CPU design a complete water, quartus platform, Verilog realization
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Size: 1100800 |
Author: 涯 |
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Description: 一个多周期CPU的完整设计,quartus平台,Verilog实现,内含实验报告,和详细的各模块功能表-Complete a multi-cycle CPU design, quartus platform, Verilog implementation, includes lab reports, and a detailed menu of each module
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Size: 6606848 |
Author: 涯 |
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Description: cpu design in verilog
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Size: 275456 |
Author: ujjwal |
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