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[Other] slaveController DL : 0: 对USB的从机设备的IP核进行了重新设计并在一定程度上进行了优化-On the USB device from the IP core has been redesigned to some extent, is optimized
Date : Size : 55kb User : shaqiu
[Other] USBreader DL : 0: USB文本阅读器，主要涉及SOPC技术，NIOS软核编程，供学习参考用-USB text reader, mainly related to SOPC technology, NIOS soft-core programming for the study and reference
Date : Size : 10kb User : lgl
[USB develop] jz4740_usb DL : 0: 华芯飞驱动ususb jz4740的免刷-Core-driven flying China-free brush ususb jz4740
Date : Size : 18kb User : hxb
[USB develop] AT91USBFramework DL : 0: AT91 USB framework 说明-AT91 USB framework that
Date : Size : 187kb User : Dable
[Embeded-SCM Develop] usb-device-core-project-1.4-iar5-at91sam9263-ek.zi DL : 0: USB Device Core For Atmel Arm
Date : Size : 262kb User : Jiank
[VHDL-FPGA-Verilog] 1 DL : 1: 15个免费的IP核 usb11,i2c,pci_core,video_compression_systems等等.-15 free IP core usb11, i2c, pci_core, video_compression_systems and so on.
Date : Size : 2.52mb User : likufan
[Books] USB_h_r2 DL : 0: The USB Host Controller is a synthesizable core and is part of the Fujitsu IPWare™ Library. The core has a complete PCI to USB interface. It is fully compliant with USB specification 1.0 and the USB Open HCI specification authored by Microsoft, Compaq, and National Semiconductor. On the PCI side, it is compliant with PCI V2.1. The core can be used on a PC motherboard with a PCI bus or a stand-alone PCI-based ASSP.-The USB Host Controller is a synthesizable core and is part of the Fujitsu IPWare™ Library. The core has a complete PCI to USB interface. It is fully compliant with USB specification 1.0 and the USB Open HCI specification authored by Microsoft, Compaq, and National Semiconductor. On the PCI side, it is compliant with PCI V2.1. The core can be used on a PC motherboard with a PCI bus or a stand-alone PCI-based ASSP.
Date : Size : 30kb User : teh
[source in ebook] USB_xilinx DL : 0: USB应用的IP核心，需要深入了解核心的行为。建立本诀窍是大大简化了全面参考应用。-Application of IP-Cores requires in-depth knowledge of the core’s behavior. Building up this know-how is greatly simplified by comprehensive reference applications.
Date : Size : 452kb User : 黎明
[USB develop] spru677(USB) DL : 0: OMAP5910 Dual-Core Processor Universal Serial Bus (USB) and Frame Adjustment Counter (FAC) Reference Guide
Date : Size : 728kb User : rasim
[Linux-Unix] Linux_USB_Core DL : 0: linux下usb core.作者语言诙谐幽默,非常容易懂.-linux under the usb core. Author Language witty humor and very easy to understand.
Date : Size : 1.08mb User : vosine
[Special Effects] DM_BF53x_USBdevice_ISP1362 DL : 0: ADI公司BLACKFIN核心的处理器，USB的硬件驱动，连接开发板和电脑主机-ADI' s BLACKFIN core processor, USB hardware drivers, connect the development board and host computer
Date : Size : 127kb User : 崔东岳
[USB develop] usb-device-core-project-at91sam9261-ek DL : 0: at91sam9261 usb 功能测试程序。iar工程格式-at91sam9261 usb functional test procedures. iar project format
Date : Size : 195kb User : lifeng
[SCM] noonlayuabasp DL : 0: 一位大师做的avrusb板，内有uabasp，uabcdc，USB虚拟示波器，USB逻辑分析仪，m8l核心。-A master to do avrusb board, there uabasp, uabcdc, USB Virtual Oscilloscope, USB logic analyzer, m8l core.
Date : Size : 646kb User : 康鹏
[VHDL-FPGA-Verilog] UART_Xilinx_vhd DL : 0: USB IPcoreIP核包含文档(带说明)-USB IPcoreIP core includes a document (with instructions)
Date : Size : 8kb User : tom
[Software Engineering] USB_PS2_MOUSE_design DL : 0: 用4BIT OTP单片机实现USB/PS2 MOUSE的设计 USB 低速设备的设计发展到现在已经有了相当的成熟度。各家IC公司都推出了USB DEVICE端的解决方案, 一般以8 BIT CPU CORE + USB SIE为主流构架。 SH69P04是中颖电子(Sinowealth)本着丰富USB产品应用,降低USB IC成本而设计的4BIT OTP单片机, 用以开发USB DEVICE设备。-the design of usb or PS2 mouse
Date : Size : 107kb User : 田野
[USB develop] usb_hub_core DL : 0: linux usb hub及其核心模块不错的资料-usb hub core
Date : Size : 100kb User : hefuhua
[Special Effects] USBDevice DL : 0: MINIARM USB通信源代码，适合MINIARM2400核心板-MINIARM USB communications source code, suitable for the core board MINIARM2400
Date : Size : 347kb User : zj9571
[VHDL-FPGA-Verilog] usb_latest.tar DL : 0: 用VHDL语言编写的USB 2.0IP核。USB 2.0的传输速率是高速率480 Mb/s，需要再外扩一个PHY。-This is a USB 2.0 compliant core，USB 2.0 allows data transfers of 480 Mb/s. Because of the high interface speed, an external PHY will be required with this core.
Date : Size : 192kb User : liang
[Communication] verilog DL : 0: source code for USB 2.0 fonction core in verilog
Date : Size : 56kb User : chaitanya
[Embeded-SCM Develop] Usb_ISP1362 DL : 0: 飞利浦公司Usb芯片ISP1362在nios中的IP核，可以用-Philips Usb-chip ISP1362 in nios in the IP core, you can use
Date : Size : 18kb User : KKK

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