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[VHDL-FPGA-Verilog] uart

Description: M_UART 介绍了通用异步收发器（UART）的原理，并以可编程逻辑器件FPGA为核心控制部件，基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程完成UART的设计。经测试，该设计完全达到了设计要求。-M_UART introduce a Universal Asynchronous Receiver Transmitter (UART) Principle and FPGA programmable logic device as the core control unit, based on the ultra-high-speed hardware description language VHDL in Xilinx
Platform: | Size: 18432 | Author: lc | Hits:

[Com Port] uart

Description: 一个基于硬件描述语言的uart核 该软核灵巧方便，占用资源小 波特率可调-A hardware description language based on the UART core of the soft-core smart convenient, small footprint adjustable baud rate
Platform: | Size: 3072 | Author: xu | Hits:

[VHDL-FPGA-Verilog] uart

Description: 基于FPGA的uart控制器，波特率可选，VHDL编程，Quartusii 6.0 平台，vhdl语言编程-FPGA-based UART controller, an optional baud rate, VHDL programming, Quartusii 6.0 platform, vhdl language programming
Platform: | Size: 5093376 | Author: 吕常智 | Hits:

[ARM-PowerPC-ColdFire-MIPS] Uart

Description: ARM7的UART驱动程序 可以自由配置缓存大小 驱动函数集 以及接口简单 很适合初学者提高自己的驱动开发能力的参考程序 产品级别的代码 注释很详尽 但需要自己提供IRQ部分的初始化部分程序 本作者不提供 程序为原创-ARM7-UART driver can configure the cache size of the drive free set of functions and simple interface is suitable for beginners to improve their ability to drive the development of reference procedures for product-level code is very detailed notes, but some need to provide their own IRQ initialization part of the process of this author does not provide procedures for the original
Platform: | Size: 7168 | Author: hncscj | Hits:

[VHDL-FPGA-Verilog] uart(Verilog)

Description: uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
Platform: | Size: 10240 | Author: 阿军 | Hits:

[DVD] UART

Description: sunplus 方案DVD UART使用方法-Sunplus DVD UART to use the program
Platform: | Size: 205824 | Author: 木木 | Hits:

[SCM] Uart

Description: nrf24e1的有关UART的驱动程序，与电脑上的串口辅助调试工具配合使用-nRF24E1 relevant UART driver, and computer-assisted debugging tools for serial port used in conjunction
Platform: | Size: 15360 | Author: jianglingling | Hits:

[VHDL-FPGA-Verilog] UART

Description: 在ＶＨＤＬ上编写了UART通信协议，对于ＦＰＧＡ开发有很大帮助-In VHDL on the preparation of a UART communication protocol, for FPGA development of great help
Platform: | Size: 143360 | Author: 王忠 | Hits:

[Com Port] uart

Description: Linux uart driver for Infineon ADM5120 SOC Uart port. This is good reference to operate the SOC uart port. -Linux uart driver for Infineon ADM5120 SOC Uart port. This is good reference to operate the SOC uart port.
Platform: | Size: 2048 | Author: Daniel Liu | Hits:

[Linux-Unix] uart

Description: uart 44b0 rs232 send receive
Platform: | Size: 41984 | Author: minjinn | Hits:

[SCM] uart

Description: MAGIC2103-ARM7开发板中的UART源程序代码-MAGIC2103-ARM7 development board of the UART source code
Platform: | Size: 1024 | Author: 吴炳志 | Hits:

[Other] u-uart

Description: UART verilog TX/RX OpenCores share
Platform: | Size: 5120 | Author: richman | Hits:

[Embeded-SCM Develop] Uart-I2C

Description: uart-I2C, working on PIC18F2420
Platform: | Size: 24576 | Author: Michael Li | Hits:

[SCM] Mega8-UART-duilie

Description: 基于队列的Mega8 UART通信驱动程序 文件名:uart.c 编译：WinAVR-20070122 硬件：CA-M8X 时钟：外部4MHz-Queue-based communication Mega8 UART Driver file name: uart.c Compiler: WinAVR-20070122 HW: CA-M8X clock: external 4MHz
Platform: | Size: 2048 | Author: 司机 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Platform: | Size: 1106944 | Author: xiao cao | Hits:

[ARM-PowerPC-ColdFire-MIPS] UART

Description: 东南大学开发ARM7芯片UART模块测试代码，完全可用-Southeast University to develop ARM7 chip UART module test code, fully available
Platform: | Size: 334848 | Author: liwei | Hits:

[SCM] UART

Description: 编程得到了异步串口UART的通讯，可以进行异步串口的传输。-Programming has been UART asynchronous serial communication, can be asynchronous serial transmission.
Platform: | Size: 13312 | Author: stone | Hits:

[SCM] Uart

Description: uart源代码-UART source code
Platform: | Size: 1024 | Author: 颜滨 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 用VHDL实现的一个uart控制器，输入时钟为33M-Use VHDL to achieve a UART controller, input clock for the 33M
Platform: | Size: 1024 | Author: mu | Hits:

[Com Port] UART

Description: 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:
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