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[Parallel PortIS61LV25616AL

Description: the verilog model of sram IS61LV25616AL device.-verilog model of the IS61LV25616AL de sram vice.
Platform: | Size: 25140 | Author: nightyboy | Hits:

[Other resourcefm1702code

Description: FM1702的例子程序 Chip type : ATmega16L Program type : Application Clock frequency : 7.372800 MHz Memory model : Small External SRAM size : 0 Data Stack size : 256
Platform: | Size: 4684 | Author: cl | Hits:

[ApplicationsZBT SRAM

Description: 用verilog HDL写的操作SRAM的源码-with Verilog HDL write operation SRAM FOSS
Platform: | Size: 6144 | Author: 刘波 | Hits:

[Parallel PortIS61LV25616AL

Description: the verilog model of sram IS61LV25616AL device.-verilog model of the IS61LV25616AL de sram vice.
Platform: | Size: 24576 | Author: nightyboy | Hits:

[VHDL-FPGA-Verilogsram__

Description: 静态随机读取存储器行为模型,可以应用于modelsim环境的仿真。-static random acts of reading memory model can be applied to the simulation environment modelsim.
Platform: | Size: 2048 | Author: 江浩 | Hits:

[SCMfm1702code

Description: FM1702的例子程序 Chip type : ATmega16L Program type : Application Clock frequency : 7.372800 MHz Memory model : Small External SRAM size : 0 Data Stack size : 256-FM1702 examples of procedures Chip type: ATmega16LProgram type: ApplicationClock frequency: 7.372800 MHzMemory model: SmallExternal SRAM size: 0Data Stack size: 256
Platform: | Size: 4096 | Author: cl | Hits:

[OtherSimulatingNuclearEventsinaTCADModelofaHighDensityS

Description: Simulating Nuclear Events in a TCAD Model of a High-Density SEU Hardened SRAM Technology.pdf
Platform: | Size: 223232 | Author: liuyi | Hits:

[VHDL-FPGA-Verilog71V416_Verilog_95461

Description: SRAM IDT71V416的VerilogHDL仿真模型源码文件-SRAM IDT71V416 simulation model of the source document VerilogHDL
Platform: | Size: 40960 | Author: 李云 | Hits:

[Other Embeded programdemo_10_3

Description: Chip type : ATmega16L Program type : Application Clock frequency : 4.000000 MHz Memory model : Small External SRAM size : 0 Data Stack size : 256-Chip type: ATmega16L Program type: Application Clock frequency: 4.000000 MHz Memory model: Small External SRAM size: 0 Data Stack size: 256
Platform: | Size: 27648 | Author: yumingjun | Hits:

[VHDL-FPGA-Verilogcy7c1371c_vhdl_10

Description: cy7c1371c ZBT SRAM 的仿真模型,VHDL编写。-the simulate model of cy7c1371c,VHDL language.
Platform: | Size: 7168 | Author: Tangyao | Hits:

[Windows DevelopIS61WV51216

Description: iss simulation model for 512KX16 SRAM
Platform: | Size: 3072 | Author: deep | Hits:

[VHDL-FPGA-VerilogT6_SRAM

Description:
Platform: | Size: 1547264 | Author: 汪东 | Hits:

[ARM-PowerPC-ColdFire-MIPSsimulator

Description: 开源的基于SystemC的模拟器,可以模拟ARM CPU, Cache, DDR,NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is OSCI SystemC 2.2.0. All of the hardware modules satisfies the OSCI standards. The simulator is composed of a CPU, cache, and memory components including DDR SDRAM, MLC NOR Flash, MLC NAND Flash, SRAM. Each memory components have it’s own memory model, which enables cycle-accurate power consumption estimation of the devices. Master and slave SystemC IPs are connected through AMBA AHB CLI (Cycle-Level Interface). You will get energy trace files for each memory devices. You will get cycle-accurate performance evaluation results CPU cycle counts information, and cache hit/miss ratio on console. Also, you can get trace files for memory devices. The simulator exhibits performance over 500 K instructions/sec, which is fairly high for a cycle-accurate system-level simulator. The simulator’s source co
Platform: | Size: 4886528 | Author: Archie | Hits:

[VHDL-FPGA-VerilogIS64LV6416L

Description: Asynchronous SRAM IS64LV6416L modelsim仿真模型-Asynchronous SRAM IS64LV6416L Verilog model
Platform: | Size: 24576 | Author: veriyc | Hits:

[VHDL-FPGA-VerilogIS63LV1024L

Description: ISSI SRAM IS63LV1024L 时序仿真模型-Verilog model of IS63LV1024L
Platform: | Size: 24576 | Author: wyc | Hits:

[VHDL-FPGA-Verilogzbt_sram_controller_latest.tar

Description: zbt_sram_controller_latest.tar.gz- pipeline “ NO WAIT” state bus SRAM model.-zbt_sram_controller_latest.tar.gz- pipeline “ NO WAIT” state bus SRAM model.
Platform: | Size: 395264 | Author: rozenan | Hits:

[VHDL-FPGA-VerilogSRAM

Description: 语言:VHDL 功能:利用VHDL编程,实现FPGA对SRAMIS61LV24516的读写操作。由于是针对IS61LV24516型号进行读写的,如果不是此型号的SRAM需要对程序进行时序修改。 仿真工具:modelsim 综合工具:quartus -Language: VHDL function: the use of VHDL programming, FPGA on SRAMIS61LV24516 read and write operations. Because it is read and write for IS61LV24516 model, if not required for this type of SRAM timing of the program changes. Simulation tools: modelsim synthesis tool: quartus II
Platform: | Size: 1024 | Author: huangjiaju | Hits:

[VHDL-FPGA-Verilogsram

Description: sram操作vhdl源程序,内有sdram模型,控制器设计,及测试源程序-sram operating in vhdl \doc DDR SDRAM reference design documentation \model Contains the vhdl SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation Contains the vhdl testbench, modelsim project file, and library \source Contains the vhdl source files for the DDR SDRAM reference design \synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
Platform: | Size: 897024 | Author: chen | Hits:

[VHDL-FPGA-VerilogSRAM

Description: VerilogHDL语言读写SRAM内部数据。SRAM芯片型号为61WV102416ALL,即1024K字,每字16位,共16Mb。工作在100MHz频率下。-VerilogHDL language to read and write internal data SRAM. SRAM chip model 61WV102416ALL, ie 1024K words, each word 16, a total of 16Mb. Work in the 100MHz frequency.
Platform: | Size: 2048 | Author: 于潇宇 | Hits:

[VHDL-FPGA-Verilogsram_test_OK

Description: 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动,SRAM型号为IS61LV25616,程序语言为Verilog,开发环境为quartusII 7.0,为一工程,可直接下载到FPGA中,含电路图-Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for quartusII 7.0, for a project, can be downloaded directly to the FPGA, including circuit diagrams
Platform: | Size: 1232896 | Author: hlt | Hits:
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