Description: Early termination enables powering
down parts of the soft-input soft-output (SISO) equalizer and decoder thereby saving power. Platform: |
Size: 104448 |
Author:suresh |
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Description: G.711使用64Kbps的带宽，可将14bits转换成8bits。目前G.711有两个编码方式，A-law以及Mu-law。-G.711 defines two main compression algorithms, the µ -law algorithm (used in North America & Japan) and A-law algorithm (used in Europe and the rest of the world). Both are logarithmic, but A-law was specifically designed to be simpler for a computer to process. The standard also defines a sequence of repeating code values which defines the power level of 0 dB.
The µ -law and A-law algorithms encode 14-bit and 13-bit signed linear PCM samples (respectively) to logarithmic 8-bit samples. Thus, the G.711 encoder will create a 64 kbit/s bitstream for a signal sampled at 8 kHz.[5]
G.711 μ-law tends to give more resolution to higher range signals while G.711 A-law provides more quantization levels at lower signal levels. When using μ-law G.711 in networks where suppression of the all 0 character signal is required, the character signal corresponding to negative input values between decision values numbers 127 and 128 should be 00000010 and the value at the decoder output is- Platform: |
Size: 915456 |
Author:coco |
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Description: 8-32 kbit/s语音和视频的结构误差不稳定窄带和宽带嵌入式变数率编码-The G.718 encoder can accept wideband sampled signals at 16 kHz, or narrowband signals sampled at either 16 or 8 kHz. Similarly, the decoder output can be 16 kHz wideband, in addition to 16 or 8 kHz narrowband. Input signals sampled at 16 kHz, but with bandwidth limited to narrowband, are detected by the encoder. The output of the G.718 codec is capable of operating with a bandwidth of 50 Hz to 4 kHz at 8 and 12 kbit/s and 50 Hz to 7 kHz from 8 to 32 kbit/s. Platform: |
Size: 8172544 |
Author:coco |
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Description: 本文利用软输入软输出信道译码器输出对数似然比随相位偏差变化的规律得到低信噪比MPSK信号的
相位偏差代价函数，并提出一种求解该代价函数的迭代相位搜索方法，以相对较小的运算量实现较高精度的相
位估计。仿真表明，该算法在低信噪比下具有稳定的性能，并且能够克服大多相位估计算法都存在的相位模糊
问题。-In this paper, the soft input soft output channel decoder output log-likelihood ratio with the variation of the phase error signal to noise ratio MPSK signals with low phase error cost function and propose a cost function for solving the iterative phase of the search method relatively less computation to achieve high accuracy phase estimates. Simulation results show that the algorithm is stable under low signal to noise ratio performance, and most of the phase estimation algorithm can overcome the phase ambiguity exists. Platform: |
Size: 202752 |
Author:motonula |
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Description: This function implememts Soft Output Viterbi Algorithm in trace back mode
Input:
rec_s: scaled received bits. rec_s(k) = 0.5 * L_c(k) * y(k)
L_c = 4 * a * Es/No, reliability value of the channel
y: received bits
g: encoder generator matrix in binary form, g(1,:) for feedback, g(2,:) for feedforward
L_a: a priori information about the info. bits. Extrinsic info. from the previous
component decoder
ind_dec: index of the component decoder.
=1: component decoder 1 The trellis is terminated to all zero state
=2: component decoder 2 The trellis is not perfectly terminated.
Output:
L_all: log ( P(x=1|y) ) / ( P(x=-1|y) )
Frame size, info. + tail bits- This function implememts Soft Output Viterbi Algorithm in trace back mode
Input:
rec_s: scaled received bits. rec_s(k) = 0.5 * L_c(k) * y(k)
L_c = 4 * a * Es/No, reliability value of the channel
y: received bits
g: encoder generator matrix in binary form, g(1,:) for feedback, g(2,:) for feedforward
L_a: a priori information about the info. bits. Extrinsic info. from the previous
component decoder
ind_dec: index of the component decoder.
=1: component decoder 1 The trellis is terminated to all zero state
=2: component decoder 2 The trellis is not perfectly terminated.
Output:
L_all: log ( P(x=1|y) ) / ( P(x=-1|y) )
Frame size, info. + tail bits Platform: |
Size: 1024 |
Author:yk |
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Description: VS2010及IT++4.2下实现PCCC在AWGN信道上的仿真-This program simulates Parallel Concatenated Convolutional Codes (PCCCs) of coding rate 1/3 using a turbo decoder with two SISO RSC modules.
Reference: S. Benedetto, D. Divsalar, G. Motorsi and F. Pollara, "A Soft-Input Soft-Output Maximum A posteriori (MAP) Module to Decode Parallel and Serial Concatenated Codes", TDA Progress Report, nov. 1996 Platform: |
Size: 2048 |
Author:raven |
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Description: VS2010及IT++4.2下实现SCCC在AWGN信道上的仿真-This program simulates Serially Concatenated Convolutional Codes (SCCCs) of coding rate 1/4 using a turbo decoder with a SISO NSC module and a SISO RSC module.
Reference: S. Benedetto, D. Divsalar, G. Motorsi and F. Pollara, "A Soft-Input Soft-Output Maximum A posteriori (MAP) Module to Decode Parallel and Serial Concatenated Codes", TDA Progress Report, nov. 1996 Platform: |
Size: 2048 |
Author:raven |
Hits:
Search - soft-input soft-output Decoder