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[SC+EDM

Description: 利用格子——Boltzmann方法,伪式模型, 编程实现液滴演变(Using lattice-Boltzmann method, pseudo-model and programming to realize droplet evolution)
Platform: | Size: 2048 | Author: 博子君 | Hits:

[matlabPolar译码算法集合

Description: Polar码的SCL,SC,BP,SCAN译码算法(decoding algorithm of polar code)
Platform: | Size: 2048 | Author: wolfcyan | Hits:

[3G developsc算法

Description: Schmidl算法实现符号定时同步,和频偏估计。(Schmidl algorithm implements symbol timing synchronization and frequency offset estimation.)
Platform: | Size: 5120 | Author: 张雅123 | Hits:

[matlab第8讲程序

Description: 移动通信中的极化码编码 SC译码 SCL译码 快速SC算法(wireless communication)
Platform: | Size: 5120 | Author: mirandanana | Hits:

[SourceCodePolar code

Description: Polar code encode and decode encode :GA and MC decode:BP、SCL、SC,etc
Platform: | Size: 14436 | Author: 18895687447 | Hits:

[matlabsc

Description: 基于lpv线性化方法对反应堆功率进行控制,有不包含反应性反馈和包含温度反馈两种情况,并在simulink中进行仿真。(Based on the LPV linearization method, the reactor power is controlled. There are two cases, one is not including the reactivity feedback and the other is including the temperature feedback.)
Platform: | Size: 539648 | Author: 落花花不落 | Hits:

[Communication-MobilePolar Codes in MATLAB - v2

Description: polar code编译码 包括生成矩阵编码,SC译码算法,BER和BLER计算以及画图。(Polar code encoding and decoding It includes generating matrix coding, SC decoding algorithm, BER and BLER calculation and drawing.)
Platform: | Size: 397312 | Author: bkg | Hits:

[matlabPolar Code

Description: 该代码从polar信道编码到SC译码算法在BEC信道上进行全面仿真。仿真结果是基于不同码率的误块率。(The code from polar channel coding to SC decoding algorithm is simulated in BEC channel. The simulation results are based on different bit rate block error rate.)
Platform: | Size: 12288 | Author: maxwwx | Hits:

[Communication-Mobilemain_SC

Description: 实现单载波系统仿真,采用频域均衡方式,代码运行结果良好(The simulation of single carrier system is realized, and the frequency domain equalization method is adopted. The code runs well)
Platform: | Size: 1024 | Author: 蜜桃摇摇冰 | Hits:

[JSP/Javawindows 7网页模拟程序

Description: windows7模拟器,带有任务栏,时钟,可以访问网页 来源:站长素材 类似资源:http://sc.chinaz.com/jiaoben/150901411330.htm
Platform: | Size: 898368 | Author: XIELEIOU | Hits:

[matlabbeamforming-master

Description: # Beamforming Matlab files for various types of beamforming for custom 1D, 2D and 3D arrays. - Calculate and look at beampattern/array pattern/array factor for 1D, 2D and 3D arrays - Calculate and look at beampattern for delay-and-sum and minimum variance beamformers - Create input signals with multiple sources of the same single frequency arriving at different angles and with different sources - Calculate steered response for delay-and-sum, minimum variance, MUSIC and functional beamforming algorithm - Improve resolution with deconvolution algorithms DAMAS and CLEAN-SC
Platform: | Size: 24190976 | Author: 哇哈哈呀1 | Hits:

[matlabForearc topographic response to viscoelastic flow in subduction channels: A 2D finite element code for MATLAB

Description: We model deformation in the subduction channel (SC) and overriding plate as two-dimensional incompressible, Newtonian, isotropic, Stokes viscoelastic creeping flow under the influence of gravity in a Lagrangian finite element grid. SC flow in the trench-parallel direction is assumed to be small compared to flow along a plane normal to the trench axis.
Platform: | Size: 114800 | Author: farshid74 | Hits:

[VHDL-FPGA-Verilogxapp_hls_Matrix Multiply

Description: This repository includes a pure Vitis HLS implementation of matrix-matrix multiplication (A*B=C) for Xilinx FPGAs, using Xilinx Vitis to instantiate memory and PCIe controllers and interface with the host. Experiments run on a VCU1525 achieved 462 GFLOP/s, 301 GFLOP/s and 132 GFLOP/s for half, single, and double precision, respectively, with routing across the three SLRs being the primary bottleneck preventing further scaling. The code is not device-specific, and can be configured for any Xilinx FPGA supported by the Xilinx OpenCL runtime. Kernels have also been verified to execute on TUL KU115, Alveo U250, and Alveo U280 boards with similar results. The implementation uses a systolic array approach, where linearly connected processing elements compute distinct contributions to the outer product of tiles of the output matrix. The approach used to implement this kernel was presented at FPGA'20 [1]. For a general description of the optimization techniques that we apply, we refer to our article on HLS transformations [2]. We also gave a tutorial on HLS for HPC at SC'21, ISC'21, SC'20, HiPEAC'20, SC'19, SC'18, and PPoPP'18.
Platform: | Size: 585044 | Author: 1679556379@qq.com | Hits:
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