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[VHDL-FPGA-Verilog] rs232_tr

Description: 自学的串口通信模块，包含接收模块，发送模块，波特率模块，顶层模块-RS232 communication application,VHDL code
Platform: | Size: 5120 | Author: lkg | Hits:

[source in ebook] rs232lab

Description: Programming to interface with RS232 using VHDL on ALTERA KIT
Platform: | Size: 152576 | Author: binhnhi | Hits:

[VHDL-FPGA-Verilog] UART

Description: 使用标准VHDL编写的RS232协议，可在CPLD或者FPGA上直接实现串口通信功能。-use VHDL to implement RS232 protocol, which can be used in CPLD or FPGA
Platform: | Size: 530432 | Author: 林铎 | Hits:

[VHDL-FPGA-Verilog] bldc_motor_control_design_example

Description: 无刷直流电机 VHDL VERILOG 控制,速度环，RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA- actel VERILOG BLDC control of the use of actel FPGA
Platform: | Size: 741376 | Author: | Hits:

[VHDL-FPGA-Verilog] M_UartRecv0_tb

Description: rs232串口基于VHDL的testbench代码 很有用的 经过验正的 -RS232 serial port based on testbench s VHDL code is very useful to the RS232 serial port based on testbench VHDL code is very useful to pass the test
Platform: | Size: 1024 | Author: 孙悦 | Hits:

[SCM] RS232--TEST--VHDL

Description: 自己编写的程序，自己做的板子，并且调试成功了，可以下载使用的很好的测试程序。-I have written a program, do their own board and debugging successful, the program can be downloaded for use. .
Platform: | Size: 4096 | Author: 林木 | Hits:

[VHDL-FPGA-Verilog] rs_232

Description: Comunication rs232 in vhdl
Platform: | Size: 1024 | Author: Thiago Amaral | Hits:

[VHDL-FPGA-Verilog] URAT

Description: 在ISE环境下，用VHDL语言实现RS232串口设计，实现串口通信。通过串口调试工具向 0000000UART发送16进制数，FPGA将UART接收到的串行数据转换为并行数据，并在8个 LED灯上输出显示；同时，并行数据又被重新转换为串行数据，重新送给RS-232接口，并在 串口调试工具上再次显示，SW0为复位键。 比如：串口调试工具发送两位16进制数，然后能在LED上显示，并且重新在串口调试工 具上显示。串口调试工具设置：波特率设为9600，默认奇校验。-In the ISE environment, using VHDL language RS232 serial port design, serial communication. Through the serial debugging tool to 0000000UART Send a hexadecimal number, FPGA serial data received by the UART converted to parallel data, and 8 LED lights on the output display the same time, parallel data has been re-converted to serial data, re-sent to the RS-232 interface, and in Serial debugging tools on the show again, SW0 for the reset button. For example: serial debugging tool to send two 16 hexadecimal number, and then can be displayed on the LED, and re-debugging in the serial port With a display. Serial debugging tool settings: baud rate is set to 9600, the default odd parity.
Platform: | Size: 403456 | Author: panda | Hits:

[VHDL-FPGA-Verilog] M_UartRecv0

Description: rs232串口基于VHDL的代码 很有用的 正确的 rs232串口基于VHDL的代码 很有用的 正确的(RS232 serial port based on VHDL code is very useful for the correct RS232 serial port based on VHDL code is very useful)
Platform: | Size: 3072 | Author: 孙悦 | Hits:
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