Search - quartus

[VHDL-FPGA-Verilog] qts_qii53009

Description: Quartus II SignalTap II说明文档，详细介绍了在quartusII中如何使用SignalTapII实现内部逻辑分析仪功能。-Quartus II SignalTap II documentation, detailed in the introduction quartusII in SignalTapII realize how to use the internal logic analyzer function.
Platform: | Size: 1142784 | Author: 杨开轶 | Hits:

[Other] 4_in_1

Description: 骏龙提供的最新quartus8.0的license，包括Quartus II 8.0，NIOS II 8.0（在Quartus II的license里面），DSP Builde 8.0，ModelSim-Altera 6.1g (Quartus II 8.0)，新Quartus II的license支持远程桌面访问的功能。-Cytech latest quartus8.0 the license, including the Quartus II 8.0, NIOS II 8.0 (in the Quartus II
Platform: | Size: 332800 | Author: 王网 | Hits:

[VHDL-FPGA-Verilog] sin

Description: 基于Quartus II 5.0编写的正弦波发生器，可控频率，用vhdl编写的-Quartus II 5.0 on the preparation of the sine wave generator, controllable frequency, prepared using VHDL
Platform: | Size: 475136 | Author: uuk | Hits:

[VHDL-FPGA-Verilog] Modelsim

Description: 不错的Quartus II 与modelsim结合仿真简介笔记，较为适合初学者，希望对大家有帮助！
Platform: | Size: 1357824 | Author: 刘英 | Hits:

[Other] quartusiihongmokuai

Description: 关于quartus ii 宏模块的介绍，方便FPGA开发-Quartus ii macro modules on Introduction to facilitate the development of FPGA
Platform: | Size: 7168 | Author: 王金栓 | Hits:

[VHDL-FPGA-Verilog] lunwen

Description: 详细介绍了VHDL语言的功能，运用Quartus II 平台完成信号发生器的设计-Detailed VHDL language features, the use of Quartus II platform to complete the design of signal generator
Platform: | Size: 354304 | Author: whxllw | Hits:

[VHDL-FPGA-Verilog] jian2

Description: 1、掌握VHDL的结构以及实例的编程； 2、学会使用QuartusⅡ平台的开化； 3、设计一个2位BCD码加法器。-1, to master the structure and example VHDL programming 2, learn how to use Quartus Ⅱ Kaihua platform 3, the design of a two BCD code adder.
Platform: | Size: 512000 | Author: jian | Hits:

[VHDL-FPGA-Verilog] QuartusIICourseOfStudy

Description: 《Quartus II 中文版教程》 Quartus II Course Of Study 详细介绍了Quartus II使用流程，适合初学者使用。
Platform: | Size: 844800 | Author: chenli | Hits:

[VHDL-FPGA-Verilog] risc_cpu

Description: 8位risc cpu的编写，使用quartus软件对其进行写入，里面内置乘法器、除法器等模块-8-bit risc cpu the preparation, use the Quartus software to write, which built-in multiplier, divider modules
Platform: | Size: 814080 | Author: 瑞翔 | Hits:

[Linux-Unix] quartus_license.tar

Description: quartus linux 版通用破解文件-Common quartus linux version crack file
Platform: | Size: 6144 | Author: lianjay | Hits:

[VHDL-FPGA-Verilog] sinwave

Description: 正弦波信号发生的源码，有详细文档说明在quartus上创建工程到仿真、下载的步步操作-Sine wave signal source, has detailed documents created in the Quartus simulation works, download the step-by-step operation
Platform: | Size: 2471936 | Author: benyue | Hits:

[VHDL-FPGA-Verilog] flowled

Description: FPGA开发入门的Verilog HDL程序---流水灯,真实可用，验证通过，工程环境为Altera Quartus -FPGA development of Verilog HDL entry procedures- water lights, the real available, authentication is passed, the project environment for Altera Quartus
Platform: | Size: 193536 | Author: renyong0801 | Hits:

[VHDL-FPGA-Verilog] liangzhu

Description: FPGA开发入门的Verilog HDL程序2---梁祝音乐播放,真实可用，验证通过，工程环境为Altera Quartus II -Introduction to the Verilog HDL FPGA development process 2 --- Butterfly music player, the real available, verified by the project environment for the Altera Quartus II
Platform: | Size: 301056 | Author: renyong0801 | Hits:

[Other] 80sp1crack

Description: quartus II 8.0sp1 patch破解文件-quartus II 8.0sp1 patch crack file
Platform: | Size: 798720 | Author: 王京 | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera

Description: 利用Nios Ⅱ软核处理器，以Altera公司的UP3开发板为硬件平台，以Quartus II、Quartus ID为软件开发平台，设计一个电子钟，实现下列系统功能：（1）在液晶屏上显示时间、日期、状态提示；（2）利用4个按键对时间（时分秒）、日期（年月日）进行设置；（3）利用一个LED灯指示当前设置状态；-The use of soft-core processor, Nios Ⅱ to Altera s UP3 development board as the hardware platform to Quartus II, Quartus ID for software development platform, design a clock
Platform: | Size: 6460416 | Author: Emma | Hits:

[Software Engineering] AlteraQuartusI7.2

Description: Altera Quartus Ii 7.2 实用指南-Altera Quartus Ii 7.2 实用??南
Platform: | Size: 334848 | Author: xiyt | Hits:

[VHDL-FPGA-Verilog] dds

Description: 实现dds功能，利用quartus软件，子模块包括加法器，锁相环，date-rom 利用原图将各模块综合，利用ps2键盘控制频率及相位。-Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.
Platform: | Size: 2854912 | Author: lijingfeng | Hits:

[Embeded-SCM Develop] quartus

Description:
Platform: | Size: 10531840 | Author: liuhongjie | Hits:

[VHDL-FPGA-Verilog] quartusexample

Description: quartus一个完整的设计例子,从安装到实例完成，仿真等全过程，适合从0开始的初学者-Quartus a complete design examples, examples from installation to completion, the entire process of simulation, etc., suitable for the beginner to start from 0
Platform: | Size: 1937408 | Author: mcuxxq | Hits:

[VHDL-FPGA-Verilog] Des2Sim

Description: 本文介绍了一个使用 VHDL 描述计数器的设计、综合、仿真的全过程，作为我这一段时间自学 FPGA/CPLD 的总结，如果有什么不正确的地方，敬请各位不幸看到这篇文章的大侠们指正，在此表示感谢。当然，这是一个非常简单的时序逻辑电路实例，主要是详细描述了一些软件的使用方法。文章中涉及的软件有Synplicity 公司出品的Synplify Pro 7.7.1； Altera 公司出品的 Quartus II 4.2；Mentor Graphics 公司出品的 ModelSim SE 6.0。 -This article describes a VHDL description of the use of counter design, synthesis, simulation of the entire process, this time as my self-FPGA/CPLD summary, if what has not the right place, please see this article that, unfortunately, the heroes They correct me, wish to express my gratitude. Of course, this is a very simple example of sequential logic circuit is mainly a detailed description of a number of software usage. Article involved in the software company has produced Synplicity
Platform: | Size: 1945600 | Author: 黄鹏曾 | Hits:

« 1 2 3 4 5 6 7 89 10 11 12 13 ... 50 »

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list