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Description: 由于使用了大量数目的子载波，这就使得多载波系统对多种同步误差都很敏
感。同步误差可分为两大类:载波相位
-due to the use of the large number of subcarriers, which makes multi-carrier systems for a variety of synchronization errors are very sensitive. Synchronization error can be divided into two categories : carrier phase
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Size: 10240 |
Author: 张开 |
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Description: A system simulation environment in Matlab/Simulink of RFID is constructed in this paper.
Special attention is emphasized on the analog/RF circuit.Negative effects are concerned in the system
model,such as phase noise of the local oscillator,TX-RX coupling,reflection of the environment,
AWGN noise,DC offset,I/Q mismatch,etc.Performance of the whole system can be evaluated by
changing the coding method,parameters of building blocks,and operation distance.Finally,some
simulation results are presented in this paper.
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Size: 2099200 |
Author: liulang |
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Description: We address the problem of blind carrier frequency-offset (CFO) estimation in quadrature amplitude modulation,
phase-shift keying, and pulse amplitude modulation
communications systems.We study the performance of a standard
CFO estimate, which consists of first raising the received signal to
the Mth power, where M is an integer depending on the type and
size of the symbol constellation, and then applying the nonlinear
least squares (NLLS) estimation approach. At low signal-to noise
ratio (SNR), the NLLS method fails to provide an accurate CFO
estimate because of the presence of outliers. In this letter, we derive
an approximate closed-form expression for the outlier probability.
This enables us to predict the mean-square error (MSE) on CFO
estimation for all SNR values. For a given SNR, the new results
also give insight into the minimum number of samples required in
the CFO estimation procedure, in order to ensure that the MSE
on estimation is not significantly affected by the outliers.
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Size: 1265664 |
Author: 吴大亨 |
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Description: 在DAB系统中的频率同步，载频同步，参考一下Carrier frequency offset estimation of DAB receiver based on phase reference symbol-In the DAB system frequency synchronization, carrier frequency synchronization, refer to Carrier frequency offset estimation of DAB receiver based on phase reference symbol
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Size: 210944 |
Author: Aries |
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Description: 寻找匹配块，用于电子稳相中求偏移矢量
代表点匹配法-To find matching pieces for electronic image stabilization phase offset vector for the representative point matching method
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Size: 2048 |
Author: likewind |
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Description: 这个Matlab的m代码解决了薛定谔方程，沿着带宽频率和相位偏移，显示三维图像。-The Matlab m-code to solve the Schrodinger equation along the bandwidth of the frequency and phase offset, showing three-dimensional image.
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Size: 51200 |
Author: 雷锋 |
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Description: 利用EDA技术和FPGA在UP3开发板上实现直接数字频率综合器的设计。
实验中加入了相位控制字PWORD，用以控制相位偏移量的前四位，将相位偏移量加到ROM地址总线 上，从而引起从ROM中取得的正弦信号的偏移，实现移相信号发生器的移相功能。
实验中还加入了LCD显示功能，通过LCD显示模块器件，用LCD显示正弦信号的频率，所显示的频 率也是由频率字控制的。LCD的驱动原理同上次实验。-The use of EDA technology and FPGA development in the UP3 board direct digital frequency synthesizer design. Experiment by adding a phase control word PWORD, to control the phase offset of the top four will be added to the phase offset ROM address bus, thereby causing ROM obtained from the sinusoidal signal offset, shifted believe realize its phase-shifting function generator. Experiments have also joined the LCD display, LCD display module through the device, with LCD display the frequency of sinusoidal signal, as shown by the frequency of word frequency control. LCD driving principles with the previous experiment.
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Size: 1225728 |
Author: Emma |
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Description: This file contains a matlab file for blind carrier estimation which compute the phase and frequency offset of carrier due to Doppler shift.
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Size: 1024 |
Author: Abbas |
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Description: OQPSK Demodulation Project in Matlab.
OQPSK means offset quadrature phase shift keying. an important modulation scheme in IEEE 802.15.4
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Size: 3072 |
Author: rc13 |
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Description: Joint maximum likelihood (ML)symbol-time and carrier-frequency offset estimator in orthogonal frequency-division multiplexing(OFDM) systems.-Joint maximum likelihood (ML)symbol-time and carrier-frequency offset estimator in orthogonal frequency-division multiplexing(OFDM) systems.
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Size: 136192 |
Author: jenna |
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Description: 任意移相方波信号产生的VHDL代码。输入任意一个的相位偏移值就都能产生与参考方波有指定相位差的同频信号。-Square-wave signal of arbitrary phase shift generated by VHDL code. Enter any one of the phase offset can be generated on a designated phase with the reference square wave signal the same frequency.
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Size: 1024 |
Author: wuyihua |
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Description: In this simulink model , QPSK modulation and demodulation is simulated .A square root raised cosine pulse shaped signal is modulated and given as input to the demodulator.The received signal
is demodulated and given to the detector where it is matched filtered and down-sampled .The effects of symbol timing offset can be seen by varying the phase of down-sampling operation.The signal transmitted is recovered at the detector output.-In this simulink model , QPSK modulation and demodulation is simulated .A square root raised cosine pulse shaped signal is modulated and given as input to the demodulator.The received signal
is demodulated and given to the detector where it is matched filtered and down-sampled .The effects of symbol timing offset can be seen by varying the phase of down-sampling operation.The signal transmitted is recovered at the detector output.
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Size: 8192 |
Author: quail |
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Description: Cyclone™ FPGA具有锁相环（PLL）和全局时钟网络，提供完整的时钟管理方案。Cyclone PLL具有时钟倍频和分频、相位偏移、可编程占空比和外部时钟输出，进行系统级的时钟管理和偏移控制。Altera® Quartus® II软件无需任何外部器件，就可以启用Cyclone PLL和相关功能。本文将介绍如何设计和使用Cyclone PLL功能。
PLL常用于同步内部器件时钟和外部时钟，使内部工作的时钟频率比外部时钟更高，时钟延迟和时钟偏移最小，减小或调整时钟到输出（TCO）和建立（TSU）时间。
-Cyclone ™ FPGA with a phase-locked loop (PLL) and the global clock network and provide a complete clock management solution. Cyclone PLL with the clock multiplier and divider, phase offset, programmable duty cycle and the external clock output for system-level clock management and offset control. Altera ® Quartus ® II software does not require any external devices, you can enable the Cyclone PLL and related functions. This article describes how to design and use the Cyclone PLL features. PLL clock devices commonly used in the synchronization of internal and external clock, so that the inner workings of the clock frequency higher than the external clock, clock delay and clock skew minimum, reduce or adjust the clock to the output (TCO) and the establishment of (TSU) time.
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Size: 553984 |
Author: 裴雷 |
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Description: OFDM通信系统调制解调 包括数字前端处理、卷积编码、峰均值抑制、符号定时、频偏检测、信道估计、相位补偿等-OFDM modulation and demodulation communication system including digital front-end processing, convolution coding, the mean peak inhibition, symbol timing, frequency offset detection, channel estimation, phase compensation
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Size: 119808 |
Author: 宋巍 |
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Description: 16QAM载波同步的影响仿真，针对有频偏，有相偏，无频偏相偏情况下的星座图。-16QAM carrier synchronization of simulation, for a frequency offset, a phase offset, phase offset without offset under the constellation.
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Size: 1024 |
Author: 吴明钦 |
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Description: 这个程序是用在LDPC加EM中的，自己编的有很好的性能，用来估计依稀未知的参数，比如相偏频偏之类的-This procedure is used in LDPC EM in Canada, his series have good performance, used to estimate the unknown parameters vaguely, such as phase offset of the class of partial
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Size: 69632 |
Author: 龚万春 |
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Description: An inductive feedback technique increases the speed
of resonant circuits by 62 , allowing operation near the of
transistors. The technique leads to a fundamental oscillator operating
at 128 GHz with a power dissipation of 9 mW and a phase
noise of 105 dBc/Hz at 10-MHz offset. A divide-by-two circuit
based on the idea and incorporating a sampling mixer achieves a
maximum speed of 125 GHz while consuming 10.5 mW. The prototypes
have been fabricated in 90-nm CMOS technology.-An inductive feedback technique increases the speed of resonant circuits by 62 , allowing operation near the of transistors. The technique leads to a fundamental oscillator operating at 128 GHz with a power dissipation of 9 mW and a phase noise of 105 dBc/Hz at 10-MHz offset. A divide-by-two circuit based on the idea and incorporating a sampling mixer achieves a maximum speed of 125 GHz while consuming 10.5 mW. The prototypes have been fabricated in 90-nm CMOS technology.
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Size: 1960960 |
Author: 吕凌 |
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Description: 本程序仿真了16QAM信号的载波相偏估计的HOS算法，整个算法实现分为（1）模拟发送端发送16QAM信号；（2）加入相偏来模拟通过信道后有相偏的测试信号；（3）利用HOS算法进行相偏估计与纠正；（4）输出星座图。-This procedure simulated a 16QAM signal carrier phase offset estimate of the HOS algorithm, the algorithm is divided into (1) analog transmitter to send 16QAM signal (2) by the inclusion of partial to simulate the channel after the phase offset of the test signal (3 ) algorithm using HOS phase offset estimate and correction (4) output constellation.
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Size: 17408 |
Author: 朵朵 |
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Description: 语言：VHDL
功能：该PN4序列的特点为将一个4位序列的前两位取异或，再让序列左移一位，用异或的结果作为序列的最后一位。序列周期是15，即15位伪随机序列。其中包括序列的产生模块和检测模块。对于误码检测，首先捕获相位。然后，规定测试的码的总个数，统计这些码中有多少个不能满足PN序列特点的，用计数器统计个数。如果发现误码过多，可能是相位失调，重新捕获相位，再进行误码检测。
仿真工具：modelsim
综合工具：quartus -Language: VHDL
function: the sequence characteristics of the PN4 a 4-bit sequence of the first two to take different or, let a sequence of left, with the result as a sequence of different or the last one. Sequence cycle is 15, or 15-bit pseudo-random sequence. Including sequence generation module and detection module. For error detection, the first capture phase. Then, provided the total number of test code, statistics, the number of these codes can not meet the characteristics of PN sequences, with the number of counter statistics. If you find too many errors, it may be the phase offset, re-acquisition phase, then the error detection. Simulation tools: modelsim
synthesis tool: quartus II
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Size: 4096 |
Author: huangjiaju |
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Description: This is a file for Blind frequency offset
estimation for overlap PCC-OFDM systems
in presence of phase noise
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Size: 681984 |
Author: katha |
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