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Description: PLX SDK for Linux v.7.25 for the PCIe switches
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Size: 3799040 |
Author: lukier
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Description: 室外wifi安全审计系统
GPS
SIM
pcie
集成各种功能(Outdoor WiFi security audit system
GPS
SIM
PCIe
Integrate various functions)
Platform: |
Size: 8293376 |
Author: 胡子巴茬
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Description: PCIE_dma 设计，基于xilinx virtex7 fpga芯片，实现高速传输(PCIE_dma design, based on the Xilinx virtex7 FPGA chip, to achieve high speed transmission)
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Size: 9906176 |
Author: crizy0703
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Description: Embedded 43602 driver broadcom
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Size: 369664 |
Author: yellowbath
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Description: PHY相关的用法，主要用于PCIE结构下的说明(PHY Interface for the PCI ExpressTM Architecture)
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Size: 214016 |
Author: eddiehebin2017
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Description: pcie接口说明，描述pice接口的结构和功能(description of pice express.)
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Size: 8092672 |
Author: yy1985
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Description: PEX 8311 ExpressLane PCI Express-to-Generic Local Bus Bridge Data Book
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Size: 2530304 |
Author: cypress |
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Description: Complete code of PCIe with test example
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Size: 1683456 |
Author: HAMAYOUNAHMAD |
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Description: PCIExpressMiniCardElectromechanicalSpecification.Revision1.2-2007
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Size: 3831808 |
Author: sailorow |
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Description: MTK/联发2×2双频无线局域网5.0GHz网卡芯片MT7612EN
该MT7612E是一个高度集成的单芯片，内置了一个2×2双频无线局域网的无线。它支持IEEE802.11ac的标准草案，并提供最高的PHY速率可达867Mbps，提供功能丰富的无线连接和可靠的吞吐量从一个扩展的距离。优化的射频架构和基带算法提供了卓越的性能和低功耗消费。(MTK/mediatek 2 x 2 MT7612EN 5.0 GHz dual-band wireless LAN card chip
The MT7612E is a highly integrated single chip, built a 2 x 2 dual-band wireless LAN, wireless.It supports the draft standard IEEE802.11 ac, and provide the highest PHY rate of up to 867 MBPS, provide feature-rich wireless connections and reliable throughput the distance from an extension.Optimization of radio frequency (rf) architecture and baseband algorithm provides excellent performance and low power consumption.MT7612E integrated PA/LNA has referred to the number of external components is reduced to a minimum.Smart MAC design and deployment of an efficient DMA engine and data processing hardware accelerator uninstall host processor.The MT7612E support 802.11 I safety standards, and realize the hardware acceleration TKIP, CCMP and WAPI.The device will also support the QoS of 802.11 e video, voice and multimedia applications.)
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Size: 2335744 |
Author: yushibin |
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Description: stm407 uCOS 移植，本工程实现uCOS任务调度，可直接在stm407上运行(It's a uCOS souce planted on STM407 MCU)
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Size: 610304 |
Author: vent_ |
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Description: Xilinx 开发板 示例工程 及 软硬件源码(Xilinx development board example engineering and software and hardware source code)
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Size: 12788736 |
Author: 唐朝的风 |
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Description: PLX公司的PCIe 桥路芯片详细说明，供PCIe桥路最新开发使用(the datasheet of PEX8619 for development)
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Size: 1105920 |
Author: xxxxdddd |
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Description: PCI Express CEM 1.1 specification
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Size: 1191936 |
Author: jcusack12 |
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Description: PCIeM.2接口规范V1.0接口定义，定义了M.2子卡规范、插座规范、对插规范及电气规范等。(PCI Express M.2 Specification Revision 0.7, Version 1.0 November 27, 2012)
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Size: 4254720 |
Author: Xuemin |
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Description: 主要包含Xilinx FPGA DMA各类驱动(Xilinx FPGA DMA Driver)
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Size: 11559936 |
Author: wykay |
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Description: PCI Express Base Specification Revision 2.1
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Size: 3416064 |
Author: w19 |
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Description: Jmicron JMS583 Datasheet USB 3.1 Gen 2 to PCIe Gen3x2 Bridge
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Size: 730112 |
Author: Eugeny |
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Description: This repository includes a pure Vitis HLS implementation of matrix-matrix multiplication (A*B=C) for Xilinx FPGAs, using Xilinx Vitis to instantiate memory and PCIe controllers and interface with the host.
Experiments run on a VCU1525 achieved 462 GFLOP/s, 301 GFLOP/s and 132 GFLOP/s for half, single, and double precision, respectively, with routing across the three SLRs being the primary bottleneck preventing further scaling. The code is not device-specific, and can be configured for any Xilinx FPGA supported by the Xilinx OpenCL runtime. Kernels have also been verified to execute on TUL KU115, Alveo U250, and Alveo U280 boards with similar results.
The implementation uses a systolic array approach, where linearly connected processing elements compute distinct contributions to the outer product of tiles of the output matrix.
The approach used to implement this kernel was presented at FPGA'20 [1]. For a general description of the optimization techniques that we apply, we refer to our article on HLS transformations [2]. We also gave a tutorial on HLS for HPC at SC'21, ISC'21, SC'20, HiPEAC'20, SC'19, SC'18, and PPoPP'18.
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Size: 585044 |
Author: 1679556379@qq.com |
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