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Description: 在ADI的Blackfin系列DSP上编写的语音＆音频程序-the ADI Blackfin DSP series on the preparation of voice & audio program! !
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Size: 477184 |
Author: 李里 |
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Description: 基于FPGA的全数字调制解调器设计实例，包含有Matlab程序和Quartus程序-FPGA-based all-digital modem design example, contains the procedures and Quartus program Matlab
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Size: 656384 |
Author: |
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Description: 我刚完成的基于Quartus Two 开发环境全部用Verilog硬件描述语言编译无误的MSK调制解调器-I have just completed development environment based on the Quartus Two full use Verilog hardware description language compiler unmistakable MSK modem
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Size: 27648 |
Author: lgl |
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Description: 全数字fsk调制解调的实现 verilog源码-All-digital realization of fsk modem verilog source code
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Size: 674816 |
Author: liulei |
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Description: 采用VHDL实现的UART硬件模块，该模块包括了modem的硬件实现，已经仿真测试代码，顶层模块可以采用VHDL或verilog实现，便于嵌入到自己的设计之中。文档中附有详细的使用说明和注释。-Achieved using VHDL hardware UART module, the module includes the hardware modem has simulation test code modules can be used top-level VHDL or verilog to achieve easy embedded into the design of their own. Document with detailed instructions and notes.
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Size: 217088 |
Author: pd |
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Description: ofdm调制解调的fpga实现。使用Verilog实现IEEE 802.16a系统的调制解调模块。-ofdm modulation and demodulation of fpga implementation. Verilog implementation using IEEE 802.16a system, modem module.
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Size: 2048 |
Author: 张维 |
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Description: 用verilog 编写的gps系统调制解调器，很大很实用-Gps system prepared with verilog modem, very very useful
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Size: 13493248 |
Author: 吴雷 |
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Description: The SC16C752B is a dual Universal Asynchronous Receiver/Transmitter (UART) with
64-byte FIFOs, automatic hardware/software flow control, and data rates up to 5 Mbit/s
(3.3 V and 5 V). The SC16C752B offers enhanced features. It has a Transmission Control
Register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during
hardware and software flow control. With the FIFO Rdy register, the software gets the
status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide
the user with error indications, operational status, and modem interface control. System
interrupts may be tailored to meet user requirements. An internal loopback capability
allows on-board diagnostics.
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Size: 160768 |
Author: 刘伟 |
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Description: 基于FPGA的通信系统调制解调，包括理论知识介绍和VHDL程序。包含2ASK ,2FSK，2PSK
-FPGA-based modem communication systems, including the introduction of theoretical knowledge and the VHDL program. Contains 2ASK, 2FSK, 2PSK
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Size: 607232 |
Author: songlina |
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Description: <基于Verilog HDL的通信系统设计>源码，包含ASK,FSK,PSK,QPSK,PPM等的调制解调-< Verilog HDL-based communication system design> source, including ASK, FSK, PSK, QPSK, PPM and other modem
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Size: 6144 |
Author: cjl |
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Description: 这是一个QPSK比较完整的FPGA工程，是用Verilog语言写的，主要包括调制解调模块。-This is a QPSK FPGA project is written in Verilog language, including the modem module.
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Size: 455680 |
Author: |
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Description: QPSK调制是数字调制解调中
最为常见的调制方式之一，此Verilog
文件可以在FPGA上实现QPSK的调制方式-QPSK modulation is one of the most common digital modem modulation scheme, this Verilog file QPSK modulation scheme can be implemented on FPGA
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Size: 1024 |
Author: 陆从乐 |
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Description: qpsk的调制解调的Verilog实现,用Verilog语言来编写实现qpsk调制的实现，已经经过仿真通过。-qpsk modem s Verilog implementation using Verilog language to write achieve qpsk modulation implementation has passed through simulation.
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Size: 4096 |
Author: daruili |
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Description: Quartus II开发套件，256qam的Verilog仿真，有编码和解码过程-Quartus II，256qam，Verilog，Modem，Demodem
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Size: 3072 |
Author: 宾芬 |
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