Search - memory controller

[ARM-PowerPC-ColdFire-MIPS] mem_ctrl.tar

Description: verilog 写的 memory controller ，可以控制SDRAM SRAM NOR -written in Verilog memory controller, can control SDRAM SRAM NOR
Platform: | Size: 331776 | Author: youjia | Hits:

[Software Engineering] P4_PPC_SDRAM_Reference_Design

Description: SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM-SDRAM reference design: mainly include The following figure shows a high-level block diagram for this reference design followed by a briefdescription of each sub-section. The design consists of: PowerPC processor PLB-OPB bridge BlockRAM Memory Controller SDRAM Controller Two GPIO ports A UART Port External SDRAM
Platform: | Size: 33792 | Author: 庞志勇 | Hits:

[VHDL-FPGA-Verilog] my_zbt_controller

Description: ZBT内存控制器.支持OPB总线。VHDL源码-ZBT memory controller. Support the OPB bus. VHDL source
Platform: | Size: 1024 | Author: 吕奔 | Hits:

[FlashMX] SD-Mem-Ctrl-1-2-Flyer

Description: SD 2.0 Memory Controller SD Bus Interface SD Controller Logic NAND Flash Controller
Platform: | Size: 75776 | Author: roger shan | Hits:

[VHDL-FPGA-Verilog] memory

Description: Verilog写的内存控制器代码. 很好,很容易看懂-Verilog code to write the memory controller
Platform: | Size: 2048 | Author: www | Hits:

[Embeded-SCM Develop] SPI_FLASHBURNER

Description: PC Host used for controlling and command exchanging to the SPI flash memory controller which enables reading, writing and bulk erasing of SPI flash memories such as ST25p16 and 25p32 used on the WGT624V3 Netgear s router.
Platform: | Size: 233472 | Author: AMSJ | Hits:

[VHDL-FPGA-Verilog] memory_cores_latest[1].tar

Description: 存储器控制器，是Verilog描述，希望对大家有帮助！-Memory controller
Platform: | Size: 16384 | Author: 罗锋 | Hits:

[VHDL-FPGA-Verilog] del_ctrl

Description: A VHDL logical example of memory delay controller -A VHDL logical example of memory delay controller
Platform: | Size: 1024 | Author: gios78 | Hits:

[Other Embeded program] Intel-IOP341-DDR2-memory-controller-initializtion.

Description: 可以基于本流程了解IOP Raid处理器在启动时对DDR2内存控制器的初始化。也可以以此了解其他片上系统的DDR2控制器的启动方法。-Understanding of this process can be based on IOP Raid processor at boot time on the DDR2 memory controller initialization. Can also be used to understand the other system-on-chip DDR2 controller start-up method.
Platform: | Size: 77824 | Author: youxiaoguang | Hits:

[ELanguage] FSA506

Description: Initialization code for FSA506 - controller for TFT 3,5" 4,3" and 5,7" from AMPIRE with internal memory.-Initialization code for FSA506- controller for TFT 3,5" 4,3" and 5,7" from AMPIRE with internal memory.
Platform: | Size: 866304 | Author: tom | Hits:

[VHDL-FPGA-Verilog] sdram_ver_134

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is based Xilinx FPGA Playform.
Platform: | Size: 108544 | Author: peace | Hits:

[VHDL-FPGA-Verilog] sdram_vhd_134

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
Platform: | Size: 488448 | Author: peace | Hits:

[VHDL-FPGA-Verilog] c_xapp260

Description: xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Platform: | Size: 1123328 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] mem_stick

Description: Sony - memory stick pro controller (verilog)-Sony- memory stick pro controller (verilog)
Platform: | Size: 912384 | Author: curliph | Hits:

[VHDL-FPGA-Verilog] Chapter10

Description: 第十章的代码。本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示-Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate
Platform: | Size: 6872064 | Author: xiao | Hits:

[VHDL-FPGA-Verilog] Chapter11-13

Description: 第十一章到第十三章的代码本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 5088256 | Author: xiao | Hits:

[assembly language] l7

Description: 使用VHDL语言编写的简易数字存储示波器，用MAX+PlusII仿真验证。VHDL编写了采样、存储写、存储读和显示4个模块。采样使用ADC0809，存储器使用6264，显示使用DAC0832。-The design of the chip as a high-speed signal ADC0809 the A / D converter, SRAM6264 memory for data storage after sampling, DAC0832 chip as a signal of D / A conversion. Programming using ultra-high-speed hardware description language VHDL description of its A / D conversion, A / D sampling controller and data storage, digital output programming, simulation, the completion of the design of hardware and software, as well as some of the experimental prototype debugging -DAC0832。-The design of the chip as a high-speed signal ADC0809 the A/D converter, SRAM6264 memory for data storage after sampling, DAC0832 chip as a signal of D/A conversion. Programming using ultra-high-speed hardware description language VHDL description of its A/D conversion, A/D sampling controller and data storage, digital output programming, simulation, the completion of the design of hardware and software, as well as some of the experimental prototype debugging
Platform: | Size: 148480 | Author: 统一 | Hits:

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