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Description: 锁相回路可视为一个输出相位和输入相位的回授系统用以同步输入参考讯号和回授后输出信号。并让其操作同样的频率。如(图一)所示，简单锁相回路[3,4]是由三个电路构成，分别为相位侦测器（Phase Detector）、回路滤波器（Loop Filter）、压控荡器（VCO）-phase-locked loop can be regarded as a phase output and input phase feedback system for synchronous reference input and feedback signals After the output signal. And allowed to operate the same frequency. If (Figure 1), the simple lock-loop [3,4] by the three circuit. for the detection phase (Phase Detector), loop filter (Loop Filter), VCO finishes (VCO)
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Size: 149858 |
Author: 王浩 |
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Description: 锁相回路可视为一个输出相位和输入相位的回授系统用以同步输入参考讯号和回授后输出信号。并让其操作同样的频率。如(图一)所示，简单锁相回路[3,4]是由三个电路构成，分别为相位侦测器（Phase Detector）、回路滤波器（Loop Filter）、压控荡器（VCO）-phase-locked loop can be regarded as a phase output and input phase feedback system for synchronous reference input and feedback signals After the output signal. And allowed to operate the same frequency. If (Figure 1), the simple lock-loop [3,4] by the three circuit. for the detection phase (Phase Detector), loop filter (Loop Filter), VCO finishes (VCO)
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Size: 149504 |
Author: 王浩 |
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Description: 使用virlog语言编写的一个 锁相环的程序。可直接在cpld中应用。-Virlog languages use a phase-locked loop procedure. Can be directly applied in the CPLD.
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Size: 230400 |
Author: 占敖 |
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Description: 在软件接收机的基础上,利用鉴频器辅助鉴相器的输出,引入一个模糊逻辑控制器,使得环路能够智能跟踪信号的动态变化.实验结果证明所提出的设计方法与传统环路相比可大幅度缩短跟踪时间,减小环路滤波器带宽,并能消除周跳.-In the software receiver, based on the use of auxiliary frequency discriminator phase detector output, the introduction of a fuzzy logic controller, the loop can be intelligent tracking signal dynamics. The experimental results demonstrate that the proposed design method with the traditional loop phase than we might have to significantly reduce the tracking time, reduce the loop filter bandwidth, and can eliminate the cycle slips.
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Size: 344064 |
Author: 何宁 |
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Description: 血凝仪检测系统,硬件电路部分由正弦波产生模块、前级放大与滤波模块、检测线圈、锁相环同步检波模块、后级平滑滤波与放大模块、AD转换器、线圈驱动模块、单片机模块等部分组成。-Coagulometer detection system, the hardware circuit sine wave generated by the module, pre-amplification and filtering module, detection coil, phase-locked loop synchronous detector modules, after-class smoothing filtering and amplification modules, AD converter, coil drive module, single-chip modules, such as machine parts.
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Size: 95232 |
Author: 韦编三绝 |
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Description: H9200是一款商品防盗EAS主板,用于商场、服装，超市等场所的防盗产品，本产品采进了先进的数字检波技术，自动增益控制技术（AGC技术），锁相环（PLL）等技术，与以同类产EAS产品相比，有性价比高，误报率低，检测率高，反应速度快，结构更加合理，性能更加稳定等优点!-EAS H9200 motherboard manual, H9200 is a used for shopping malls, clothing, supermarkets and other places of the anti-theft products, the products taken into the advanced digital detector technology, AGC Technology (AGC technology), phase-locked loop (PLL) such as technology, with production of similar products, compared EAS, there are cost-effective, low false alarm rate, detection rate, response speed, the structure more reasonable and more stable performance and so on.
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Size: 577536 |
Author: |
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Description: An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf
This paper investigates the design of passive
loop filters for Frequency Synthesizers utilizing a Phase-
Frequency Detector and a current switch charge pump.-An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase-Frequency Detector and a current switch charge pump.
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Size: 129024 |
Author: 刘洋 |
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Description: ADF4157是ADI公司出品的一款锁相环芯片，它含有一个鉴相器，一个电子泵，一个sigma delta 分频器-ADI Corporation ADF4157 is a production of the chip phase-locked loop, which contains a phase detector, an electronic pump, a sigma delta prescaler
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Size: 350208 |
Author: sherry |
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Description: 该Si4133是一个单片集成电路，既执行IF和双频
RF合成为无线通信应用。在Si4133
包括三个和VCO，环路滤波器，参考和VCO分频器，相位
探测器。除法和可编程掉电设置与threewire
串行接口。-The Si4133 is a monolithic integrated circuit, both the implementation of the IF and dual-band RF synthesis for wireless communications applications. In the Si4133 consists of three, and VCO, loop filters, reference and VCO divider, phase detector. Division and programmable power-down settings threewire serial interface.
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Size: 470016 |
Author: 峰之巅 |
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Description: 锁相电路是相位锁定环(Phase Locked Loop)的简称，主要由鉴相器、环路滤波、压控振荡器成 。主要是要掌握LabVIEW图形化编程特点，-PLL circuit is phase-locked loop (Phase Locked Loop) for short, mainly by the phase detector, loop filter, VCO into. Mainly to grasp the features of LabVIEW graphical programming,
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Size: 19456 |
Author: 生活的 |
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Description: 一种感应线圈车辆检测器的抗干扰方法，An Induction Loop Vehicle Detector interference method-An Induction Loop Vehicle Detector interference method
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Size: 114688 |
Author: 几几 |
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Description: 本文在分析GPS 软件接收机跟踪原理的基础上，首先比较码环与载波环不同鉴相器的性能，然后对二阶锁相环中不同环路参数设下的跟踪效果进行仿真分析，最后设计
了合适的码环与载波环路，并用实际采集的GPS 数据论证了所设计环路的有效性，为GPS 软件接收机跟踪环路的设计提供了参考。-Based on the analysis of GPS receiver tracking software on the basis of the principle, first compare the different code loop and carrier loop phase detector performance, and the different second-order PLL loop parameters set by the tracking simulation analysis, the final design the appropriate code loop and carrier loop, and with real GPS data collected demonstrated the validity of the design loop for GPS receiver tracking loop design software provides a reference.
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Size: 634880 |
Author: herui |
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Description: it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm and the test bench of it.
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Size: 5120 |
Author: syamprasad |
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Description: 基于Verilog的数字锁相环。包括三个模块，数字鉴相器DPD、数字环路滤波器DLF、数控振荡器 DCO三部分构成-Verilog-based digital PLL. Consists of three modules, the digital phase detector DPD, digital loop filter DLF, digitally controlled oscillator DCO three parts
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Size: 668672 |
Author: 栾帅 |
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Description: 数字锁相环频率合成器的设计,鉴相器、环路滤波器、数控振荡器、反馈分频器-Digital PLL frequency synthesizer, phase detector, loop filter, NCO, feedback divider
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Size: 798720 |
Author: taotao |
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Description: 采用ADS对环路中鉴相鉴频器和电荷泵进行联合仿真，优化整体性能。-By ADS on the loop phase frequency detector and charge pump joint simulation, optimizing the overall performance.
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Size: 21504 |
Author: weijianjun |
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Description: costas的verilog程序，包含乘法器，DDS，鉴相器，环路滤波器等模块-costas the verilog program, including multipliers, DDS, phase detector, loop filter modules
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Size: 6144 |
Author: 潇潇 |
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Description: 数字锁相环的设计，包括鉴相器，环路滤波器，spi口输出，分频器的源代码-Digital phase-locked loop design source code, including the phase detector, loop filter, spi port output divider
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Size: 370688 |
Author: zhujianhua |
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Description: 一种快速的基于在弦到点距离累技术的角点检测- A Fast Corner Detector Based on the Chord-to-Point Distance Accumulation Technique
1. Find the edge image using the Canny edge detector.
2. Extract edges (curves) from the edge image:
2a. fill gaps if they are within a range and select long edges,
2b. find T-junctions and mark them as T-corners.
2c. obtain the `status of each selected edge ${\Gamma}$ as either `loop or `line .
3. Smooth ${\Gamma}$ using a small width Gaussian kernel in order to remove quantization noises and trivial details. This small scale Gaussian smoothing also offers good localization of corners.
4. Select significant points on the smoothed curve using scale evolution technique.
5. At each selected point of the smoothed curve, compute three discrete curvatures following the CPDA technique using three chords of different lengths.
6. Find three normalized curvatures at each selected point of and then multiply them to obtain the curvature product.
7. Find the local maxima of
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Size: 7168 |
Author: zhouyan |
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Description: charge pump phase-locked loop with digital phase-frequency detector,charge pump phase-locked loop with digital phase-frequency detector matalab model
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Size: 456704 |
Author: my name |
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