Description: 本原码是基于Verilog HDL语言编写的，实现了SPI接口设计，可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success in the compiler, Modelsim SE with six successful simulation. Platform: |
Size: 1731 |
Author:jevidyang |
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Description: 本原码是基于Verilog HDL语言编写的，实现了SPI接口设计，可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success in the compiler, Modelsim SE with six successful simulation. Platform: |
Size: 1024 |
Author:jevidyang |
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Description: Verilog实现 spi接口的FPGA实现 通过仿真，修改后即可应用-Verilog realize spi interface FPGA to achieve through the simulation, the application can be modified Platform: |
Size: 274432 |
Author:强冰 |
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Description: 基于Verilog HDL的SPI代码，可在FPGA上实现SPI接口，请大家参考-Verilog HDL based on the SPI code, implementation in FPGA on SPI interface, please refer to Platform: |
Size: 1024 |
Author:treefan.liang |
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Description: SPI串行总线接口的Verilog实现.pdf
通过FPGA实现-The Verilog implementation of the SPI serial bus interface. Pdf FPGA implementation Platform: |
Size: 240640 |
Author:青蛙 |
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Description: 基于FPGA设计，verilog语言变成的，SPI通用接口模块，顶层已封装成类似标准的FIFO接口；提供仿真文件；仿真器为modelsim10.0c，波形观察debussy。-Based on the FPGA design, Verilog language into a, SPI universal interface module, the top has been packaged into a FIFO interface similar to that of the standard provide simulation files simulator for modelsim10.0c, waveform observation debussy. Platform: |
Size: 553984 |
Author:Zou Xingyu |
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Description: 本程序使用Verilog语言实现了SPI接口的设计，可以直接烧到FPGA实现与MCU的通信,自带有测试文件。-The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file. Platform: |
Size: 4096 |
Author: |
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Description: 该代码完成存储器的数据存储和读取功能，该芯片是一款Atmel的SPI接口的EEPROM存储芯片。(The code completes the memory data storage and reading function, the chip is a Atmel SPI interface EEPROM memory chip.) Platform: |
Size: 6144 |
Author:leixiaoming
|
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Description: SPI通信：串行flash的读写擦除命令通过SPI接口进行通信。?
CPU芯片与FPGA通过SPI接口进行通信。?
其他功能集成电路芯片参数寄存器配置。例如DAC芯片内部有很多寄存器（因为芯片有很多功能，要通过设置寄存器不同的开关来打开或关闭相应的功能，一上电去初始化寄存器）需要我们去配置。FPGA一上电也是通过配置芯片里边来读取数据，然后配置FPGA内部的SRAM。FPGA是读取FLASH里边的串行数据，读取完校验完才配置到我们的FPGA的SRAM中去。速度比串口快，而且是同步传输。(The read and write erasure commands of the serial flash communicate through the SPI interface.
The CPU chip communicates with the FPGA through the SPI interface.
Other functional integrated circuit chip parameters register configuration.
For example,there are many registers in the DAC chip (because the chip has many functions. We need to configure it by setting up different registers to open or close the corresponding functions, and initializing registers on the battery. FPGA also reads the data by configuring the chip, and configures the SRAM inside the FPGA. FPGA is a serial FLASH read the data inside,read check after all the configuration to the FPGA SRAM to).
The speed is faster than the serial port, and it is synchronous transmission.) Platform: |
Size: 3389440 |
Author:小云子 |
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