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[Other] fpedit

Description: Xilinx FPGA 开发软件ISE中的FPGA Edit使用方法详细介绍-Xilinx FPGA development software ISE FPGA Edit the use of detailed
Platform: | Size: 813056 | Author: sk | Hits:

[Books] RSP_Noise_and_Clutter

Description: 雷达的噪声与杂波研究，怎样在噪声和杂波中发现目标回波，并提取信息。-radar noise and clutter, how the noise and clutter found echo, and retrieve information.
Platform: | Size: 121856 | Author: 褚江涛 | Hits:

[Software Engineering] up_261128143F5F01A9

Description: 为解决直接序列扩频系统的数字收发机中初始频率的捕获问题，提出了一种通过DFT变换，在频域 上进行抛物插值运算的频偏估计的算法。该算法可适应低信噪比、宽频率偏移范围的恶劣通信环境和突发的通信 模式，且算法复杂度较低。该算法已在FPGA 中实现。-To address the direct sequence spread spectrum system, the number of transceivers in the initial frequency of the capture problem, a transformation through the DFT, in the frequency domain for parabolic interpolation computing frequency offset estimation algorithms. The algorithm can be adapted to low signal to noise ratio, broadband rates offset the scope of bad communications environment and unexpected modes of communication, and the algorithm complexity low. The algorithm has been realized in the FPGA.
Platform: | Size: 63488 | Author: 赵平 | Hits:

[Speech/Voice recognition/combine] LMSjiangzao

Description: LMS多麦克风语音降噪的主程序是lmsspdn.m-Multi-microphone noise reduction LMS voice is the main program lmsspdn.m
Platform: | Size: 1693696 | Author: 夏天 | Hits:

[Other] zishiyinglvbodebiyesheji

Description: 论文针对数字通信系统中，由于码间串扰(ISI)和信道加性噪声的干扰，导致信号在接收端产生误码，设计了基于LMS算法的自适应均衡器(滤波器)，并通过硬件描述语言VHDL和现场可编程逻辑器件FPGA实现均衡器的硬件实现。是一篇标准的毕业论文,有需要的朋友可以拿来做参考-Thesis for digital communications systems, crosstalk due to inter-symbol (ISI) and additive noise channel interference, leading to signals generated in the receiver error, design algorithm based on LMS adaptive equalizer (filter), and through hardware description languages VHDL and Field Programmable Logic Device FPGA hardware equalizer realize realize. Is a standard thesis, there is a need to make friends can be used as reference
Platform: | Size: 2353152 | Author: YZ | Hits:

[Documents] QPSK

Description: 提出了一个采用(2,1,7)卷积码+QPSK的中频调制解调方案,并在Xilinx公司的100万 门FPGA芯片上实现了该系统。该系统在信噪比SNR为6dB左右时可实现速率超过1Mbit/s、误码率 小于10-5的数据传输。 -Proposed a use of (2,1,7) convolutional code+ QPSK modulation and demodulation of the IF program, and in Xilinx' s FPGA chip one million on implementation of the system. The system SNR to 6dB signal to noise ratio at about the rate may achieve more than 1Mbit/s, less than 10-5 bit error rate of data transmission.
Platform: | Size: 62464 | Author: 张同星 | Hits:

[Speech/Voice recognition/combine] lms

Description: 自适应LMS算法。由于我要使用，所以将信源信号及加澡后的信源信号保存起来。方便在FPGA设计里使用。-Adaptive LMS algorithm. Because I would like to use, so the source signal and add a noise after the shower saved the source signal. Designed to use in the FPGA.
Platform: | Size: 1024 | Author: xiaoLEE | Hits:

[Software Engineering] FPGA

Description: 为了满足科研与实验需要,提出并实现了一种以FPGA和高速D/A为核心,其结构简单,控制灵活,信号质量高的多功能信号源生成系统。该信号源生成系统能够实时产生中心频率在30~130 MHz的各种雷达、通信、导航和白噪声等信号,且产生的各种信号频率、幅度、相位和其他参数均可控。信号源作为基带信号单元配以混频模块,可实现在任意频段的信号。另外,该信号源还可以作为一个通用平台,通过FPGA内部程序的更新来实现其他复杂信号。-This paper presents and makes a multi-functional signal source based on FPGA and high speed D/A which has simple configuration,flexible controlling,and top-quality signals to satisfy needs of the scientific research and experiment.This signal source can generate several signals as radar signals,communication signals,navigation signals,noise signals and so on.These signals have center frequency between 30~130 MHz,its frequency,power,phase and other parameters are adjustable.This signal source can also ...
Platform: | Size: 330752 | Author: 将建 | Hits:

[Software Engineering] FPGA

Description: 基于FPGA数字乘法器的设计：数字乘法嚣是目前数字信号处理中运用最广泛的执行部件之一，本文设计了三种基于FPGA 的数字乘法器．分别是移位相加乘法嚣、加法器树乘法器和移位相加一加法嚣树混合乘法器。通过对三种方案的仿真综合以厦速度和面积的比较指出了混合乘法器是其中最佳的设计方案-FPGA-based digital multiplier design: the number of multiplicative noise is the use of digital signal processing in the most extensive one of the implementation of components, the paper design of the three types of FPGA-based digital multiplier. Shift sum are noise multiplication, adder tree multiplier and the sum of a displacement hybrid adder tree multiplier noise. Through the simulation of three options to building a comprehensive comparison of the speed and size that the multiplier is one of the best hybrid design
Platform: | Size: 147456 | Author: 南才北往 | Hits:

[Other Embeded program] 20090903FPGA

Description: 本文论述并设计实现了一个脱机自由手写体数字识别系统。文中首先对待识别数字的预处理进行了介绍，包括二值化、平滑滤波、规范化、细化等图像处理方法；其次，探讨了如何提取数字字符的结构特征和笔划特征，并详细地描述了知识库的构造方法；最后采用了以知识库为基础的模板匹配识别方法,并以MATLAB作为编程工具实现了具有友好的图形用户界面的自由手写体数字识别系统。实验结果表明，本方法具有较高的识别率，并具有较好的抗噪性能。-In this paper, designed and implemented an off-line handwritten numeral recognition system. The paper first pre-treatment identification numbers were introduced, including binarization, smoothing filter, normalization, thinning and other image processing methods secondly, to explore how to extract the number of characters in the structural characteristics and stroke features, and described in detail Knowledge of construction methods finally adopted in order to Knowledge-based template matching recognition method, and to MATLAB as a programming tool to achieve a friendly graphical user interface handwritten numeral recognition system. The experimental results show that this method has higher recognition rate, and has good anti-noise performance.
Platform: | Size: 350208 | Author: zhangying | Hits:

[VHDL-FPGA-Verilog] noise

Description: 基于FPGA的噪声产生电路，用MATLAB设计噪声仿真程序，产生仿真数据的方法。并利用FPGA模拟信号。其中有详尽的matlab仿真程序，FPGA仿真结果以及总的设计报告。-Noise generating circuit based on FPGA, using MATLAB simulation program designed noise, resulting simulation data. Analog signal using the FPGA. Which detailed matlab simulation program, FPGA simulation results and the overall design of the report.
Platform: | Size: 1278976 | Author: hp | Hits:

[VHDL-FPGA-Verilog] jiyu-FPGA-chaochengboxinhaochuli

Description: 了降低超声波流量检测过程中噪声对检测精度的影响，采用FPGA器件构建了FIR滤波器，并提出一种新颖的查表法替代滤波器中的乘法运算-In order to reduce the flow in the process of ultrasonic testing noise on the influence of the precision, based on FPGA device constructed the FIR filter, and put forward a novel querying method of replacement filters multiplication
Platform: | Size: 135168 | Author: 紫微 | Hits:

[Software Engineering] generate-white-noise-with-fpga

Description: 一共7篇文章，介绍了使用fpga产生任意分布白噪声的方法，值得借鉴,A total of seven articles, describes using fpga to generate arbitrary distribution of white noise, it is worth learning
Platform: | Size: 2449408 | Author: wyzg | Hits:

[Software Engineering] FPGA-Muti-clock

Description: FPGA 或者CPLD多时钟设计指南，如何使得多时钟设计时候减少抖动，噪音等-FPGA or CPLD clock design guide, how to make multi-clock design time to reduce jitter, noise, etc.
Platform: | Size: 174080 | Author: 啊牛 | Hits:

[Special Effects] Median-Filtering-Alogrithm-on-FPGA

Description: 在该算法的FPGA实现过程中，充分利用FPGA硬件的并行性，并且采用流水线技术，提高了图像滤波的处理速度。FPGA硬件实现的结果表明，该算法与传统的快速滤波算法相比，不仅能够满足图像处理的实时性要求，而且还能在滤除图像椒盐噪声的同时，避免滤波后图像变得模糊的缺陷，达到了保护原始图像细节的目的。-In the implemention of this algorithm on FPGA,we can make full use of the property of hardware parallelism and adopt the pipelining technology to abtain the purpose of improving image processing speed.The implementation results of this alorithm on FPGA hardware show that,this algorithm not only meets the requirements of real-time image processing,but also avoids the flaw of image burring in filtering the salt and pepper noise and achieves the purpose of preserving image details,compared with the traditional fast median filtering algorithm.
Platform: | Size: 2447360 | Author: Rokey_Niu | Hits:

[Software Engineering] Design-and-Implementation-of-FPGA

Description: 设 计与 实 现了 一种 以 F P GA 为核 心 的实 时 频 谱分 析 系 统。 系 统 包含  实时 频 谱 监 测 和  实 时 频 谱仪 2 种 频 谱分 析 模式 。 实 时频 谱 监 测 模 式采 用 F F T 算法 设 计实 现 , 用 于 对信 号 的 实时 监 测  实 时 频 谱 仪 模 式 采 用 D F T 算法 设计 实 现, 用于 信 号的 细致 分 析。 实验 证 明 , 系 统 充 分 利 用 了 F P GA 芯 片 的 资 源, 具 有 实 时 性好 、 频 谱 分析 参数 可 调、 多通 道循 环 切换 分析 等 特点 。目 前 该系 统已 成 功应 用于 HFC 双向 网 络反 向通 道 噪声 的 频谱 分 析 和 监 测之 中。-Design and Implementation of a kind FP GA as the core real-time spectrum analysis system. System includes real-time spectrum monitoring and real-time spectrum analyzer two kinds of spectrum analysis mode. Real-time spectrum monitoring mode using the FFT algorithm design and implementation for real-time monitoring of the signal real-time spectrum analyzer mode using DFT algorithm design and implementation, for a detailed analysis of the signal. Experimental results show that the system takes full advantage of FP GA chip resources, with real-time, spectral analysis parameters adjustable, multi-channel switching cycle analysis and so on. The spectral analysis of the current system has been successfully applied to a two-way HFC network and back-channel noise being monitored.
Platform: | Size: 218112 | Author: 张春竹 | Hits:

[Other Embeded program] noise_del

Description: FPGA 中噪声消除功能的实现实例，仅供参考-FPGA noise delect
Platform: | Size: 1024 | Author: fhzlv | Hits:

[VHDL-FPGA-Verilog] noise

Description: 使用FPGA搭建NOISE||内核，在内核基础上进行工程建立。(Using the FPGA to build NOISE || kernel, based on the kernel to build the project.)
Platform: | Size: 19713024 | Author: 湘城旧事 | Hits:

[Other] FPGA

Description: fpga generate glass noise
Platform: | Size: 3072 | Author: TAOHONGYU | Hits:

[VHDL-FPGA-Verilog] 手把手教你学FPGA 语法篇

Description: 编程规范是重中之重，带你书写良好的变成习惯(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)
Platform: | Size: 574464 | Author: 庄杰 | Hits:
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