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[Other resource] FM-ok

Description: VHDL编写的驱动DDS，ad9850的程序，用于产生FM波
Platform: | Size: 318268 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] DDS_信号源

Description: dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
Platform: | Size: 5324098 | Author: wuyunzheng | Hits:

[VHDL-FPGA-Verilog] FM-ok

Description: VHDL编写的驱动DDS，ad9850的程序，用于产生FM波-VHDL driver prepared DDS, ad9850 procedures used to produce FM wave
Platform: | Size: 318464 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] DDS-320-modu

Description: 在采用 320x240 屏的设计实验箱上运行，产生正弦波，调幅调频波形，扫频。-320x240 screen using the design of experiments to run me generate sine wave, AM FM waveforms, sweep.
Platform: | Size: 1250304 | Author: hangyinli | Hits:

[VHDL-FPGA-Verilog] dds_9760_ALL1

Description: DDS频率精确步进100HZ，拔码选择FSK，PSK，FM，ASK功能。-dds base on vhdl
Platform: | Size: 4042752 | Author: 李逵 | Hits:

[VHDL-FPGA-Verilog] dds_9760_OK

Description: ＤＤＳ信号源程序，用ＶＨＤＬ编的。里面可用拨码开关选择相应的功能：ＦＭ，ＡＳＫ，ＰＳＫ，ＡＭ（这一点实现的不是很好），但其它的很好。频率可达２５Ｍ-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequency of up to 25M
Platform: | Size: 5096448 | Author: 李逵 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 如何利用FPGA产生DDS调频信号 很具体的-How to make use of DDS generated FM signal FPGA specific
Platform: | Size: 756736 | Author: 梁梁 | Hits:

[Program doc] FPGA-DDS-FM

Description: DDS 调频信号发生器框图设计原理，有仿真测试结果-DDS signal generator FM Design Principle diagram
Platform: | Size: 69632 | Author: chenjiwei | Hits:

[SCM] dds

Description: 基于DDS的调频调相 通过改变频率控制字来控制 程序编译过 搭过硬件 可以实现-FM Based on DDS phase modulation by changing the frequency control word to control the program compiled the hardware can be achieved take-off
Platform: | Size: 459776 | Author: 梁梁 | Hits:

[VHDL-FPGA-Verilog] dds_final

Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Platform: | Size: 1638400 | Author: nostalgia | Hits:

[Software Engineering] DDS-FM-FPGA

Description: DDS介绍,FM信号发生器的设计!基于DDS技术的FM信号发生器的设计及其FPGA实现-DDS introduced, FM Signal Generator! FM signal based on DDS technology and FPGA Implementation Generator
Platform: | Size: 356352 | Author: 雨夜里 | Hits:

[Communication] xxtpxh

Description: 线性调频信号运用dds中改变k来实现信号调频的策略-Linear FM signal to change the use of k dds FM' s strategy to achieve signal
Platform: | Size: 309248 | Author: 张蓓蕾 | Hits:

[VHDL-FPGA-Verilog] ep1c12_29_dds

Description: 基于周立功SOPC实验开发平台，利用VHDL语言，实现DDS调频-Zhou, who based SOPC experimental development platform, using VHDL language, to achieve DDS FM
Platform: | Size: 110592 | Author: Vincent Zhao | Hits:

[VHDL-FPGA-Verilog] DDS(fsk-ask-psk)

Description: 基于VHDL的波形调制，其中包括调频、调幅，调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
Platform: | Size: 6747136 | Author: 王展 | Hits:

[VHDL-FPGA-Verilog] BPSK

Description: 在quartus ii下完成的用VHDL语言编写的数字式调频BPSK的调制，其中DDS和成型滤波使用ip核完成-Accomplished in quartus ii the use of VHDL language digital FM BPSK modulation, which use the ip filter DDS and forming complete nuclear
Platform: | Size: 326656 | Author: | Hits:

[VHDL-FPGA-Verilog] zhongji

Description: 基于vhdl的dds信号发生器程序，具有一致十k调频功能，输出32k及64k正弦波-Based on the dds signal generator vhdl program has a consistent ten k FM function, 32k and 64k sine wave output
Platform: | Size: 2328576 | Author: yjl | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
Platform: | Size: 546816 | Author: WSong | Hits:

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