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[DSP programfir

Description: 有限冲激响应滤波器FIR的设计。采用c语言设计。系数由matlab计算得到。可在CCS环境中采用DSPs(0TMS320C5402)来实现。-Finite Impulse Response FIR filter design. Design using c language. Coefficient calculated by matlab. Can be used in the CCS environment DSPs (0TMS320C5402) to realize.
Platform: | Size: 1024 | Author: 颜新卉 | Hits:

[VHDL-FPGA-Verilogfirshuzilvboqi

Description: :介绍了基于FPGA的FIR数字滤波器的设计与实现,该设计利用Matlab工具箱设计窗函数计算FIR滤波器系数,并通过VHDL层次化设计方法,同时FPGA与单片机有机结合,采用C51及VHDL语言模块化的设计思想及进行优化编程,有效实现了键盘可设置参数及LCD显示。结果表明此实现结构能进一步完善数据的快速处理和有效控制,提高了设计的灵活性、可靠性和功能的可扩展性。 -: This paper presents FPGA-based FIR digital filter design and realization of the design using Matlab toolbox window function designed FIR filter coefficient calculation, and through VHDL hierarchical design methodology, FPGA and MCU at the same time the organic combination of the use of C51 and VHDL language modular design concepts and optimize the programming, the effective realization of the keyboard to set the parameters and the LCD display. The results show that this structure can be further improved to achieve rapid data processing and effective controls, improved design flexibility, reliability and scalability features.
Platform: | Size: 7168 | Author: 佘斌 | Hits:

[DSP programFIR

Description: 线性缓冲区FIR滤波器设计,可利用MATLAB产生系数,利用CCS开发环境,调试成功!-FIR filter design for linear buffer can be generated using MATLAB coefficient, the use of CCS development environment, debugging success!
Platform: | Size: 5120 | Author: guyue | Hits:

[OtherFIR_csd_mul

Description: 采用CSD编码的常系数乘法器的FIR滤波器的设计。-CSD-coded using constant coefficient multipliers of the FIR filter design.
Platform: | Size: 9216 | Author: 敬礼 | Hits:

[Software Engineeringxapp1161

Description: 多相滤波系统的设计与实现,有MATLAB仿真程序,有sysgen的系统仿真,还有VHDL代码,其中还有FIR的系数参数-Polyphase filter system, the design and implementation includes a MATLAB simulation program, sysgen system simulation, and VHDL code, including FIR coefficient parameters, and so on
Platform: | Size: 724992 | Author: ddyyss | Hits:

[matlabvukghnwz

Description: FIR 底通和带通滤波器和IIR 底通和带通滤波器,最终的权值矩阵就是滤波器的系数,加入重复控制,基于matlab GUI界面设计,模拟数据分析处理的过程,实现串口的数据采集。- Bottom-pass and band-pass FIR and IIR filter bottom pass and band-pass filter, The final weight matrix is ??the filter coefficient, Join repetitive control, Based on matlab GUI interface design, Analog data analysis processing, Achieve serial data acquisition.
Platform: | Size: 6144 | Author: igbsqn | Hits:

[VHDL-FPGA-Verilog滤波器实验报告

Description: 设计一个 1MHz 的 FIR 低通滤波器。 要求: ① 时钟信号频率 16MHz; ② 输入信号位宽 8bits,符号速率 16MHz ③ 要求在 Matlab 软件中进行 FIR 滤波器浮点和定点仿真,并确定 FIR 滤波器抽头系数 ④ 写出测试仿真程序。(Design a 1MHz FIR low pass filter. Requirements: (1) clock signal frequency 16MHz; (2) input signal bit width of 8bits, symbol rate of 16MHz Requirements in Matlab FIR filter floating-point and fixed-point simulation, and determine the FIR filter tap coefficient (4) write the test simulation program.)
Platform: | Size: 342016 | Author: 羊羊驼 | Hits:

[VHDL-FPGA-Verilog哈夫曼编码器设计实验报告

Description: 要求对一段数据序列进行哈夫曼编码,使得平均码长最短,输出各元素编码和编码后的数据序列。 ①组成序列的元素是[0-9]这10个数字,每个数字其对应的4位二进制数表示。比如5对应0101,9对应1001。 ②输入数据序列的长度为256。 ③先输出每个元素的编码,然后输出数据序列对应的哈夫曼编码序列。(Design a 1MHz FIR low pass filter. Huffman coding is required for a section of data sequence to make the average code length the shortest, and the output of each element encoding and the encoded data sequence. The elements of the sequence are the 10 Numbers [0-9], each of which corresponds to a 4-bit binary representation. Let's say 5 is equal to 0101, and 9 is equal to 1001. The length of the input data sequence is 256. First output the encoding of each element, and then output the data sequence corresponding Huffman coding sequence. Requirements: (1) clock signal frequency 16MHz; (2) input signal bit width of 8bits, symbol rate of 16MHz Requirements in Matlab FIR filter floating-point and fixed-point simulation, and determine the FIR filter tap coefficient (4) write the test simulation program.)
Platform: | Size: 182272 | Author: 羊羊驼 | Hits:

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