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[DSP programTMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究,给了了将乘法化为查表的DA算法,并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证,证明了这一方法是可行和高效的,其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[Button control4yue11haoxiawu

Description: 1、基于FPGA实现FIR数字滤波器的研究(使用VHDL语言进行编程) 2、多功能单片机下载开发软硬件的设计(利用VB或V C++和C语言)有下载板和下载软件 3、迷你播放器(利用Visual Basic 6.0设计)可以播放多种格式的音乐和电影,以及图片浏览等等 4、小电容小电感测试仪 -1, FPGA-based digital FIR filter (use VHDL program) 2. Multi-function download the software and hardware design development (VB or V C and C language), downloading software and download Plate 3, Player (using Visual Basic 6.0 design) can play multiple formats of music and movies, Photo View and so on four small small inductance capacitor tester
Platform: | Size: 16384 | Author: wangxing | Hits:

[VHDL-FPGA-VerilogCIC

Description: 介绍了积分梳状滤波器(CIC)设计,压缩包里面有程序的流程图,采用verilogHDL编写,在modelsim上可以实现仿真结果,非常不错-Introduced the integral comb filter (CIC) design, there are procedures for compressed packets flow chart, using verilogHDL prepared on the ModelSim simulation results can be achieved very good
Platform: | Size: 153600 | Author: yaoyongshi | Hits:

[Software Engineering234

Description: 在接收信号的数字化、软化的实现中,数字下变频起着重要的作用。本文首先介绍了数字下 变频的组成结构,然后详细分析了数字下变频的工作原理,描述了在实现数字下变频时,设计方案所 采用的高效滤波器———CIC 滤波器和多相抽取滤波器的结构和原理。最后,用通过Simulink 对数字 下变频的性能进行了仿真。在仿真的基础上使用Insight 公司的FPGA 开发系统,用测试电路实测了 数字下变频的性-In the receiving digital signal, softening the realization, the digital down-conversion plays an important role. This article first introduced the digital down conversion of the composition, and then a detailed analysis of digital down conversion of the working principle described in the realization of digital down conversion, the design used in high-performance filters--- CIC filters and multi-phase extraction filter structure and principle. Finally, with the adoption of Simulink for digital down-conversion performance of the simulation. In the simulation based on the use of Insight s FPGA development system is measured using the test circuit of the digital down-conversion of
Platform: | Size: 333824 | Author: 赵平 | Hits:

[VHDL-FPGA-VerilogCICFPGA

Description: 本文总结了CIC 滤波器理论要点,介绍了采用FPGA设计CIC 滤波器的基本方法,使滤波器的参数可以按实际需要任意更改,给出了仿真结,验证了设计的可靠性和可行性。采用该方法设计的CIC 滤波器已用于DDC芯片,也适合下一代高频雷达系统的要求。-This paper summarizes the main points of CIC filter theory, introduced the CIC filter design using FPGA basic ways in which filter parameters can be arbitrary according to the actual needs change, the simulation node to verify the reliability of the design and feasibility. Designed using the CIC filter has been used in DDC chips, also suitable for the next generation of high-frequency radar system requirements.
Platform: | Size: 700416 | Author: 会飞的鱼 | Hits:

[matlabfourierAndFilter

Description: 频谱分析和滤波器设计 ppt文件 MATLAB表述的信号和系统, 用MATLAB与信号流图求系统 频谱分析 离散频谱与连续频谱的转换-Spectrum analysis and filter design ppt file MATLAB expression signals and systems using MATLAB and signal flow diagram for the system spectral analysis of discrete spectrum and continuous spectrum conversion
Platform: | Size: 72704 | Author: 开心 | Hits:

[VHDL-FPGA-Verilogfirshuzilvboqi

Description: :介绍了基于FPGA的FIR数字滤波器的设计与实现,该设计利用Matlab工具箱设计窗函数计算FIR滤波器系数,并通过VHDL层次化设计方法,同时FPGA与单片机有机结合,采用C51及VHDL语言模块化的设计思想及进行优化编程,有效实现了键盘可设置参数及LCD显示。结果表明此实现结构能进一步完善数据的快速处理和有效控制,提高了设计的灵活性、可靠性和功能的可扩展性。 -: This paper presents FPGA-based FIR digital filter design and realization of the design using Matlab toolbox window function designed FIR filter coefficient calculation, and through VHDL hierarchical design methodology, FPGA and MCU at the same time the organic combination of the use of C51 and VHDL language modular design concepts and optimize the programming, the effective realization of the keyboard to set the parameters and the LCD display. The results show that this structure can be further improved to achieve rapid data processing and effective controls, improved design flexibility, reliability and scalability features.
Platform: | Size: 7168 | Author: 佘斌 | Hits:

[DocumentsIIRfilterFPGA

Description: 介绍了IIR 滤波器的FPGA 实现方法,给出了 IIR 数字滤波器的时序控制、延时、补码乘法和累加四个模块的设计方法,并用VHDL和FPGA 器件实现了IIR 数字滤波。-Introduction of the IIR filter FPGA implementation method of IIR digital filter timing control, delay, multiplication and accumulation complement the four modules of the design method and device using VHDL and FPGA implementation of IIR digital filter.
Platform: | Size: 661504 | Author: 杨培科 | Hits:

[CommunicationAnFPGASoftwareDefinedUltraWidebandTransceiver

Description: Increasing interest in ultra-wideband (UWB) communications has engendered the need for a test bed for UWB systems. An FPGA-based software-defined radio provides both postfabrication definition of the radio and ample parallel processing power. This thesis presents the FPGA design for a software-defined radio targeted to impulse ultra-wideband signals. The system is capable of an effective sampling frequency of up to 8 G-samples/s using timeinterleaved sampling with eight 1-GHz ADCs. The system is also capable of transmitting UWB pulses using a transmitter board controlled by the FPGA. In this thesis, the FPGA design used to capture and export data from the eight ADCs is presented, along with two systems which make use of the transceiver: a pilot-based matched filter communications system, and a remote vital signs monitor.
Platform: | Size: 1396736 | Author: chaiwat | Hits:

[VHDL-FPGA-Verilogmultiratefilterdesign

Description: 自己编写多速率滤波器设计,采用VHDL语言,通过FPGA实现-I have written multi-rate filter design using VHDL language, through the FPGA to achieve
Platform: | Size: 161792 | Author: 球球jk | Hits:

[VHDL-FPGA-VerilogFIR_filters_Xilinx

Description: FIR filter design method using Xilinx FPGA platform.
Platform: | Size: 1805312 | Author: neorome | Hits:

[Othera2

Description: 用MATLAB设计及FPGA实现IIR滤波器的方法 摘要 本文介绍了IIR数字滤波器的传统设计思想与步骤及计算机辅助设计方法。并在FPGA上高效实现的低阶IIR滤波 器,其阶数低,实时响应快,适合雷达等的实时、高效处理环境。利用IIR滤波器的多相结构来实现该滤波器系统的方法,对于 四通道的情形在MATLAB上利用Simulink作了仿真, 并在目标板上对算法进行了实现,证明该系统能够同时处理四个通道的信号。-Using MATLAB Design and FPGA realization IIR Filter method Abstract This paper introduces IIR digital filter traditional design Thought and steps and CAD method. And FPGA on efficient realization low IIR filter, its order low, real response fast suitable radar real time, efficient processing environment. Use IIR filter multiphase structure realize the filter systematic method, for four channel circumstances in MATLAB on use Simulink made simulation and target board algorithm was realized proved system can simultaneously four channel signal.
Platform: | Size: 2021376 | Author: sfef | Hits:

[VHDL-FPGA-VerilogFIR-filter-using-fpga-design

Description: 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ,QuartusII software
Platform: | Size: 4539392 | Author: 星空心晴之夏 | Hits:

[VHDL-FPGA-Verilogfir-filter-design-using-fpga-with-MAX-Plus2

Description: 基于FPGA的高阶FIR滤波器设计用max-plus -II软件仿真-fir filter using fpga with max-plusII
Platform: | Size: 2334720 | Author: 星空心晴之夏 | Hits:

[VHDL-FPGA-VerilogFPGA_FILTER

Description: 利用FPGA设计降采样滤波器的方法,希望对你有用-FPGA design using down-sampling filter, and I hope useful to you
Platform: | Size: 115712 | Author: mengzi | Hits:

[VHDL-FPGA-Verilogep2c35_5_5_fir_test

Description: 利用fpga来设计滤波器 计算速度快,可靠性强!滤波效果很好,值得信赖-Filter design using fpga to calculate the speed, reliability! Filter works well, trustworthy
Platform: | Size: 395264 | Author: 伍龙 | Hits:

[VHDL-FPGA-VerilogMultirate-Filter-FPGAs-Using-MATLAB

Description: fpga无线通信多率滤波器设计-fpga design about multi-rate filter about wireless communication
Platform: | Size: 188416 | Author: hut | Hits:

[VHDL-FPGA-Verilog24CIC

Description: 基于fpga的抽取CIC滤波器设计,采用verilog编写,24抽取,仿真通过-Fpga-based CIC decimation filter design using verilog written, 24 extraction
Platform: | Size: 3638272 | Author: zengdeqian | Hits:

[VHDL-FPGA-Veriloginterp_24_cic

Description: 基于fpga的插值CIC滤波器设计,采用verilog编写,24倍插值,仿真通过-Fpga-based interpolation CIC filter design using verilog write, 24x interpolation, through simulation
Platform: | Size: 2336768 | Author: zengdeqian | Hits:

[VHDL-FPGA-VerilogFIR_filter

Description: 基于FPGA实现FIR滤波器功能 使用芯片为EP2C8Q208C8N,实现FIR滤波器的设计,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。-FIR filter function based on FPGA chip to use EP2C8Q208C8N, achieve FIR filter design using Verilog language programming, the present examples are engineering documents, simulation, waveform, tested can be used.
Platform: | Size: 12594176 | Author: 陈怡然 | Hits:
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