Description: I have written multi-rate filter design using VHDL language, through the FPGA to achieve
To Search:
- [speed] - Matlab-based multi-rate signal processin
- [FIR_filter_DA_machine] - verilog code used to prepare the 179 ban
- [two_channel_tdm_pcm_matlab] - simulate two channel tdm_pcm using matla
- [drive] - Call it quot super-driver book" is n
- [FFT_16] - FFT Fast Fourier Transform-verilog, the
- [fir] - Digital circuit design, fir filter desig
File list (Check if you may need any files):
滤波器多相结构的FPGA实现.pdf
Download