Search - encryption using verilog

[VHDL-FPGA-Verilog] verilogzzhwfy

Description: 用Verilog实现QPSK中的差分,扰码,串并,解差分,解扰码,解串并,用MUXPLUS2进行仿真-QPSK with Verilog realize the difference, code, and serial, Xie difference, encryption codes, and solutions Series, The simulation used MUXPLUS2
Platform: | Size: 5120 | Author: 周正华 | Hits:

[Crack Hack] des

Description: 用VERILOG语言实现的数据加密标准代码,在QUARTUS5.1上仿真过-Using Verilog language code of the Data Encryption Standard, in the simulation had QUARTUS5.1
Platform: | Size: 1436672 | Author: zhang feng | Hits:

[VHDL-FPGA-Verilog] SMS4_code

Description: 用Verilog实现国内第一个商用密码算法SMS4的加密和解密。-Using Verilog to achieve the first commercial cryptographic algorithm for encryption and decryption SMS4.
Platform: | Size: 208896 | Author: 闫伟伟 | Hits:

[VHDL-FPGA-Verilog] DES

Description: DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic
Platform: | Size: 17718272 | Author: Mr Yang | Hits:

[Crack Hack] rsa

Description: 用VHDL求rsa加密系统的密钥D（辗转相除法）-Using VHDL for rsa key encryption system D（Division algorithm）
Platform: | Size: 2384896 | Author: 齐娜 | Hits:

[Crack Hack] systemcaes_latest.tar

Description: 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
Platform: | Size: 83968 | Author: lxc | Hits:

[VHDL-FPGA-Verilog] DES

Description: 在ISE平台上，利用Verilog编程实现数据的DES加密-In the ISE platform, using Verilog programming DES data encryption
Platform: | Size: 661504 | Author: ldh | Hits:

[VHDL-FPGA-Verilog] AES256-XILINX10.1

Description: 用XILINX公司提供的NetFPGA板卡并结合软件Xilinx10.1进行系统设计，采用硬件描述语言Verilog实现了 AES-256加密算法。-Provided by XILINX board combined with software Xilinx10.1 NetFPGA system design, using Verilog hardware description language implementation of the AES-256 encryption algorithm.
Platform: | Size: 5120 | Author: yuanying | Hits:

[VHDL-FPGA-Verilog] xor_encryption

Description: A simple XOR encryption using verilog.
Platform: | Size: 1024 | Author: Moganeshwaran | Hits:

[Other] AES-based-on-FPGA-jiemi

Description: 基于FPGA的AES算法实现，使用verilog语言实现。本模块只包含解密过程，没有加密过程。-Implementation of AES algorithm based on FPGA, using Verilog language. This module contains only the decryption process, no encryption process.
Platform: | Size: 13487104 | Author: 庄德坤 | Hits:

[USB develop] USB

Description: 此例程是基于FPGA的USB控制器实例，主要功能为通过FPGA芯片控制USB芯片，实现开发板和PC机之间的USB接口数据通信，来模拟一个硬件加密设备的功能。用Verilog语言实现。-This routine is an instance of the USB controller based on FPGA, the main function is to control USB chip by the FPGA chip, implement the USB interface for data communication between development board and the PC machine, to simulate a hardware encryption devices function. Using Verilog language.
Platform: | Size: 154624 | Author: 张彦钦 | Hits:

[Crack Hack] tiny_aes_latest.tar

Description: 主要实现使用verilog HDL语言实现AES的加密算法-Main implementation using verilog HDL language implementation of AES encryption algorithm
Platform: | Size: 808960 | Author: 徐晴羽 | Hits:

[VHDL-FPGA-Verilog] 5760finalproject

Description: verilog实现的rsa加解密系统，包括大素数生成算法，包含测试文件。-rsa encryption system using verilog, including large prime number generation algorithms, including test file.
Platform: | Size: 1614848 | Author: Rain | Hits:

[VHDL-FPGA-Verilog] DES_verilog

Description: 用verilog实现的DES(Data Encryption Standard数据加密标准)，把64位明文输入变为64位密文输出块。-Using DES (Data Encryption Standard Data Encryption Standard) verilog to achieve, the 64 plaintext input into 64 output ciphertext block.
Platform: | Size: 477184 | Author: 荣志强 | Hits:

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[VHDL-FPGA-Verilog] verilogzzhwfy

[Crack Hack] des

[VHDL-FPGA-Verilog] SMS4_code

[VHDL-FPGA-Verilog] DES

[Crack Hack] rsa

[Crack Hack] systemcaes_latest.tar

[VHDL-FPGA-Verilog] DES

[VHDL-FPGA-Verilog] AES256-XILINX10.1

[VHDL-FPGA-Verilog] xor_encryption

[Other] AES-based-on-FPGA-jiemi

[USB develop] USB

[Crack Hack] tiny_aes_latest.tar

[VHDL-FPGA-Verilog] 5760finalproject

[VHDL-FPGA-Verilog] DES_verilog

[VHDL-FPGA-Verilog] sha1

[VHDL-FPGA-Verilog] DS28E01

[Other] 21ic下载_sm4算法_Verilog

[Other] 基于FPGA的AES256位加密

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