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[VHDL-FPGA-Verilog] eda

Description: 消抖程序，已经通过软件仿真，验证通过，并在试验箱上下载成功，可以达到预期的效果-Buffeting extinction procedures have been adopted by software simulation, verification is passed, and in chamber downloaded successfully, you can achieve the desired results
Platform: | Size: 655360 | Author: xu | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: eda技术与vhdl课件,很经典的学习课件-VHDL EDA technology and courseware, it is a classic learning courseware
Platform: | Size: 9823232 | Author: weijy | Hits:

[Wavelet] DDS

Description: 利用EDA技术和FPGA在UP3开发板上实现直接数字频率综合器的设计。实验中加入了相位控制字PWORD，用以控制相位偏移量的前四位，将相位偏移量加到ROM地址总线上，从而引起从ROM中取得的正弦信号的偏移，实现移相信号发生器的移相功能。实验中还加入了LCD显示功能，通过LCD显示模块器件，用LCD显示正弦信号的频率，所显示的频率也是由频率字控制的。LCD的驱动原理同上次实验。-The use of EDA technology and FPGA development in the UP3 board direct digital frequency synthesizer design. Experiment by adding a phase control word PWORD, to control the phase offset of the top four will be added to the phase offset ROM address bus, thereby causing ROM obtained from the sinusoidal signal offset, shifted believe realize its phase-shifting function generator. Experiments have also joined the LCD display, LCD display module through the device, with LCD display the frequency of sinusoidal signal, as shown by the frequency of word frequency control. LCD driving principles with the previous experiment.
Platform: | Size: 1225728 | Author: Emma | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 用VHDL语言写的，音乐演奏程序，范例歌曲为“青花瓷”片段。-Using VHDL language, and music performance procedures, examples of songs as
Platform: | Size: 700416 | Author: xiezheqi | Hits:

[Other] EDA

Description: 数字电路EDA入门－VHDL程序实例集北京邮电大学出版社-Digital circuit EDA entry-VHDL instance Set Beijing University of Posts and Telecommunications Press
Platform: | Size: 2979840 | Author: 袁诚 | Hits:

[VHDL-FPGA-Verilog] dianzishezhong

Description: 电子时钟 EDA 基本要求： 24小时计数显示；具有校时功能（时，分）附加要求 1、秒表功能（复位，计时-Electronic clock EDA basic requirements: a 24-hour count showed with a school function (hours, minutes,) Additional requirement 1, stopwatch functions (reset, clock
Platform: | Size: 3072 | Author: Jaman | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL
Platform: | Size: 17139712 | Author: 周蕾 | Hits:

[Other] MY_EDA

Description: EDA技术，实用的课件，学习EDA的教案-EDA technology, practical courseware, learning the lesson plans EDA
Platform: | Size: 5854208 | Author: wahtung | Hits:

[ELanguage] EDAshiyan

Description: EDA实验3个经典程序及图形仿真文件和实验报告,对实验参考绝对有益处.-EDA experimental three classical procedures and graphical simulation and experimental paper that reports on the experiment are likely to benefit from the absolute reference.
Platform: | Size: 863232 | Author: 乐乐 | Hits:

[Documents] EDA

Description: 出租车计费系统的设计（1）车起步开始计费（2）车行驶超过3 km后,按每公里2.2元计费（3）行驶路程达到或超过9 km后(车费达到20元)，每公里加收50％的车费,-Taxi Accounting System Design (1) cars began to start billing (2) The car traveled over 3 km, after 2.2 kilometers per billing (3) of distance traveled and met or exceeded 9 km after (fares up to 20 million) per kilometer additional 50 of the fare,
Platform: | Size: 165888 | Author: 梁德锋 | Hits:

[VHDL-FPGA-Verilog] EDA

Description: EDA试验手册包含各种试验程序，均由VHDL编写-EDA test manual contains a variety of test procedures, prepared by the VHDL
Platform: | Size: 889856 | Author: hja | Hits:

[Other] cadence_manual

Description: Cadence 的中文使用手册。作为流行的EDA 工具之一Cadence 一直以来都受到了广大EDA 工程师的青睐然而Cadence 的使用之繁琐又给广大初学者带来了不少麻烦作为一位过来人本人对此深有体会本着为初学者抛砖引玉的目的本人特意编写了这本小册子将自己数年来使用Cadence 的经验加以总结但愿会对各位同行有所帮助本册子的本意在于为初学者指路故不会对个别工具进行很详细的介绍只是对初学者可能经常使用的一些工具加以粗略的介绍其中可能还请各位同行加以指正-Cadence user manual in Chinese. As one of the popular EDA tools Cadence has always been the vast number of EDA engineers favor the use of Cadence But given the vast number of complicated for beginners brought back a lot of trouble as a person I am deep spirit for beginners goal of attracting valuable opinions I deliberately prepared this booklet will be used over the years to sum up the experience of Cadence will hopefully help you peer in this booklet is intended for beginners guide will not be the individual tools in great detail introduced only for beginners may be frequently used by some to be a rough introduction to tools which may also be called upon to peer correction
Platform: | Size: 1067008 | Author: clf | Hits:

[VHDL-FPGA-Verilog] qicheweideng

Description: 一个汽车尾灯的控制的程序，eda课程设计必备可以控制左转右转等功能-A car taillight control procedures, eda required curriculum design and other functions can be controlled左转右转
Platform: | Size: 69632 | Author: 马君 | Hits:

[Other] EDA_tool_manual

Description: 《EDA工具手册》中兴通讯康讯EDA设计部资料- EDA toolkit ZTE hearings Culture and Sport Ministry of EDA design data
Platform: | Size: 12922880 | Author: Terry | Hits:

[Windows Develop] class34

Description: eda中的8位的CPU设计，电子类专业非常实用！-EDA in eight of the CPU design, electronics professional very useful!
Platform: | Size: 443392 | Author: 王子 | Hits:

[VHDL-FPGA-Verilog] edawblzkq

Description: eda微波炉程序控制器初学vhdl语言的控制程序设计-microwave EDA VHDL language learning program controller of the control procedures designed
Platform: | Size: 8192 | Author: xiaosheng chen | Hits:

[assembly language] clock

Description: EDA 数字钟实现文件能够实现计时,闹钟,校时功能 -EDA digital clock time to achieve the realization of paper, alarm clock, school functions
Platform: | Size: 180224 | Author: yuryan | Hits:

[Education soft system] lock

Description: EDA课程设计报告－电子密码锁设计实验密码锁密码为4位-Curriculum design EDA Report- electronic locks locks password experimental design for four
Platform: | Size: 95232 | Author: hxl | Hits:

[Other] EDA

Description: eda技术的相关资料，请各位使用-EDA technology related information, please use
Platform: | Size: 951296 | Author: 王克强 | Hits:

[VHDL-FPGA-Verilog] 200881022729529

Description: eda出租车计价器的实现,实现计费,路程,速度,-EDA Taximeter realization, the realization of billing, distance, speed,
Platform: | Size: 211968 | Author: qian | Hits:

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[VHDL-FPGA-Verilog] eda

[VHDL-FPGA-Verilog] vhdl

[Wavelet] DDS

[VHDL-FPGA-Verilog] EDA

[Other] EDA

[VHDL-FPGA-Verilog] dianzishezhong

[VHDL-FPGA-Verilog] EDA

[Other] MY_EDA

[ELanguage] EDAshiyan

[Documents] EDA

[VHDL-FPGA-Verilog] EDA

[Other] cadence_manual

[VHDL-FPGA-Verilog] qicheweideng

[Other] EDA_tool_manual

[Windows Develop] class34

[VHDL-FPGA-Verilog] edawblzkq

[assembly language] clock

[Education soft system] lock

[Other] EDA

[VHDL-FPGA-Verilog] 200881022729529

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