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[VHDL-FPGA-Verilog] dds

Description: 这是一个基于ＦＰＧＡ设计的ＤＤＳ信号发生器设计。能够生成正弦波＼ＡＳＫ＼ＰＳＫ＼ＡＭ＼ＦＭ等波形。-This is an FPGA design of DDS signal generator based on. Capable of generating sine \ASK\PSK\AM\FM and other waveforms.
Platform: | Size: 1008640 | Author: 张良 | Hits:

[Internet-Network] DDS

Description: DDS模型图片查看器。 DDS模型图片查看器。-DDS model image viewer. DDS model image viewer.
Platform: | Size: 4096 | Author: zhangq | Hits:

[Other Embeded program] DDS-generator

Description: DDS function generator AD9851 and AVR witch source code.
Platform: | Size: 493568 | Author: rukzak | Hits:

[Communication-Mobile] DDS

Description: 基于DDS原理的频率信号产生方法正弦信号余弦信号-Based on the principle of DDS frequency signal generating method sinusoidal signal cosine signal
Platform: | Size: 1024 | Author: 刘介园 | Hits:

[Software Engineering] dds

Description: 基于DDS和SOPC的谐波信号发射器，拥有可调节的频率，阶段和谐波比例的谐波信号发射器由本文所设计。-Based on DDS and SOPC harmonic signal transmitter, with adjustable frequency, phase and harmonic proportion of harmonic signal transmitter designed by this article.
Platform: | Size: 14336 | Author: 翟如梦 | Hits:

[VHDL-FPGA-Verilog] dds

Description: DDS signal generator, the compression bag is a project, a full set of DDS signal generator, contains the mif file and so on
Platform: | Size: 11829248 | Author: d232 | Hits:

[Other Embeded program] dds-wave-

Description: 一种函数信号发生器，含protues仿真测试-a dds wave generater contain protues simulation
Platform: | Size: 123904 | Author: LIU WEI | Hits:

[SCM] DDS-AD9850

Description: DDSAD9850模块的操作程序，可以输出方波和正弦波，可以调节频率，使用IAR编译器编写的，msp430的程序-DDS module procedures, can output pulse and the sine wave, can adjust frequency, using the IAR compiler, msp430 program
Platform: | Size: 673792 | Author: 碎浪 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS,一项关键的数字化技术，全数字化实现、便于集成、体积小、重量轻。-DDS，A key digital technology, all-digital implementation, ease of integration, small size and light weight.
Platform: | Size: 40960 | Author: 姜凌珂 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS信号源实例，采用Quartus II开发环境-DDS signal source instance using Quartus II development environment
Platform: | Size: 995328 | Author: 杰 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS control system. it controls the chirp of the AD9854.
Platform: | Size: 1981440 | Author: Liang | Hits:

[Other] dds

Description: introduce dds network and performance of this
Platform: | Size: 10240 | Author: try_mem_3 | Hits:

[SCM] DDS

Description: STC89C52单片的程序，用来产生DDS信号，简单的信号生成程序-STC89C52 monolithic program for generating a signal DDS, a simple signal generator
Platform: | Size: 1024 | Author: 于鹏 | Hits:

[Other] DDS

Description: FPGA DDS的控制，可以用modelsim直接仿真，观察信号。-DDS of FPGA,able to simulate with modelsim and check the signal
Platform: | Size: 23346176 | Author: terran2831 | Hits:

[VHDL-FPGA-Verilog] dds

Description: FPGA产生dds正弦信号,基于quartus-FPGA generate dds sine signal, based on quartus
Platform: | Size: 3025920 | Author: 谢松伯 | Hits:

[e-language] DDS

Description: DDS是一种游戏查看软件，所有DDS文件都可以查看-DDS is a game viewing software, all DDS files can be viewed
Platform: | Size: 1563648 | Author: 阿国 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 基于FPGA，Verilog语言编写的DDS信号发生器，可生成方波、正玄波，三角波。-Based FPGA, Verilog language DDS signal generator that generates a square wave, sine wave, triangle wave.
Platform: | Size: 131072 | Author: 梁世强 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 用FPGA实现DDS，代码测试正确，可用于初学者学习使用-FPGA with DDS, code testing is correct, can be used for beginners to learn to use
Platform: | Size: 43008 | Author: Lay | Hits:

[VHDL-FPGA-Verilog] DDS-verilog

Description: DDS是直接数字式频率合成器（Direct Digital Synthesizer）的英文缩写，是一项关键的数字化技术。与传统的频率合成器相比，DDS具有低成本、低功耗、高分辨率和快速转换时间等优点，广泛使用在电信与电子仪器领域，是实现设备全数字化的一个关键技术。文件写了一个DDS的例程，并编写了TB文件。-DDS is a direct digital synthesizer (Direct Digital Synthesizer) of the English abbreviation, is a key digital technology. Compared with the traditional frequency synthesizer, DDS has the advantages of low cost, low power consumption, high resolution and fast conversion time. It is widely used in the field of telecommunication and electronic instrument, which is a key technology to realize the whole digitization of equipment. The file was written with a DDS routine and a TB file was written.
Platform: | Size: 2048 | Author: 林威 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 四通道DDS信号发生器,Four channel DDS signal generator-Four channel DDS signal generator
Platform: | Size: 579584 | Author: 王勇 | Hits:
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