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[Other resourcecrc_verilog_xilinx

Description: CRC校验码,用于对数据流进行crc校验。 主要有CRC_16,CRC_8,CRC_32校验。 所用语言为Verilog HDL.-CRC code for the data flow crc check. Main CRC_16, CRC_8, CRC_32 check. The language used for Verilog HDL.
Platform: | Size: 10947 | Author: 李鹏 | Hits:

[Modem programCRC_32

Description: this man file is CRC_32, it is computer CRC 32,so it is use look up table to computer,you can first see document.txt,hope you can use that-this file is CRC_32 man, it is computer CRC 32, so it is use to look up table computer, you can first see document.txt. hope you can use that
Platform: | Size: 1350 | Author: 黄彦柏 | Hits:

[Other resourcecrc_v3

Description: crc_32 checksum算法原理,以及具体如何用C语言实现.-crc_32 checksum algorithm theory, and the specifics of how to use C language.
Platform: | Size: 26430 | Author: 劉甜 | Hits:

[VHDL-FPGA-Verilogcrc_verilog_xilinx

Description: CRC校验码,用于对数据流进行crc校验。 主要有CRC_16,CRC_8,CRC_32校验。 所用语言为Verilog HDL.-CRC code for the data flow crc check. Main CRC_16, CRC_8, CRC_32 check. The language used for Verilog HDL.
Platform: | Size: 10240 | Author: 李鹏 | Hits:

[Modem programCRC_32

Description: this man file is CRC_32, it is computer CRC 32,so it is use look up table to computer,you can first see document.txt,hope you can use that-this file is CRC_32 man, it is computer CRC 32, so it is use to look up table computer, you can first see document.txt. hope you can use that
Platform: | Size: 1024 | Author: 黄彦柏 | Hits:

[Software Engineeringcrc_v3

Description: crc_32 checksum算法原理,以及具体如何用C语言实现.-crc_32 checksum algorithm theory, and the specifics of how to use C language.
Platform: | Size: 26624 | Author: 劉甜 | Hits:

[Communication-Mobilecrc_32

Description: CRC编码的基本实现,希望对大家有帮助:)-CRC encoding the basic realization, I hope all of you help:)
Platform: | Size: 2048 | Author: 莫子初 | Hits:

[JSP/Javajacksum-1.7.0

Description: EPG 系统中关于CRC_32 的生成的包-EPG CRC_32
Platform: | Size: 446464 | Author: machao | Hits:

[Crack HackCRC_32

Description: 给应用程序加CRC效验的小工具的源码,加CRC效验,能防止软件被修改,该工具能实现自动添加功能。-CRC added to the application of well-tested source of small tools, plus CRC-tested, to prevent the software is modified, the tool can automatically add the feature.
Platform: | Size: 180224 | Author: 朱显章 | Hits:

[VHDL-FPGA-VerilogCRC_32

Description: 用verilog语言实现的的的32位CRC生成与检验的代码-The 32bits CRC using hardware describe language of verilog
Platform: | Size: 1024 | Author: 朱猪 | Hits:

[OtherCRC_32

Description: CRC Generator for SATA
Platform: | Size: 1024 | Author: razi | Hits:

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