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[VHDL-FPGA-Verilog] bluetooth

Description: ip核，蓝牙bluetooth的fpga硬件实现-ip nuclear, Bluetooth bluetooth realize the FPGA hardware
Platform: | Size: 16384 | Author: 惠普 | Hits:

[VHDL-FPGA-Verilog] HCIUART

Description: 蓝牙HCI—UART与并口的FPGA控制接口设计-Bluetooth HCI-UART and parallel port control interface of the FPGA design
Platform: | Size: 102400 | Author: 陈臣 | Hits:

[Communication-Mobile] bluetooth.tar

Description: 蓝牙的一个ip RTL 核，不知道对大家有没有用？谢谢。-this is an IP core of blutooth.
Platform: | Size: 5120 | Author: 杨力 | Hits:

[Software Engineering] bluetooth

Description: hardware implementation of bluetooth security using safer+ algorithm
Platform: | Size: 1607680 | Author: saurabh | Hits:

[Program doc] bluetooth_latest.tar

Description: bluetooth design and vhdl code
Platform: | Size: 1849344 | Author: abul | Hits:

[VHDL-FPGA-Verilog] vhdl-for-bluetooth

Description: bluetooth source code using soc and avr. the signal between soc and avr needs a basic rule in order to flow the signal
Platform: | Size: 21504 | Author: Andy | Hits:

[VHDL-FPGA-Verilog] bluetooth-vhdl

Description: bluetooth--vhdl源码 仅供参考 希望对大家有帮助-The bluetooth- VHDL source code we want to help! ! !
Platform: | Size: 23552 | Author: xumeng | Hits:

[Home Personal application] blutooth

Description: A VHDL bluetooth transceiver UART project with python scripts.
Platform: | Size: 104448 | Author: Pasqualino31 | Hits:

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