Search - Verilog phone

[VHDL-FPGA-Verilog] cardPhone

Description: 卡式计费电话电路,用verilogHDL编写,主要完成模拟真实电话的功能-card billing telephone circuits, verilogHDL prepared with the major simulate the real phone function
Platform: | Size: 1725440 | Author: zz | Hits:

[VHDL-FPGA-Verilog] lcd_controlveriloghdl

Description: 使用Ｖeriolog hdl 编写手机屏测试程序．-Veriolog hdl prepared to use cell phone screen test.
Platform: | Size: 2048 | Author: 张毅 | Hits:

[Linux-Unix] ICcard

Description: IC电话卡计费系统，基于UNIX系统的NC—Verilog的硬件开发。-IC phone card billing system, based on the UNIX system NC-Verilog hardware development.
Platform: | Size: 1306624 | Author: 王沙一 | Hits:

[VHDL-FPGA-Verilog] guard_against_theft

Description: 利用XC9572－PQ44（Xilinx CPLD）制作的一款家用防盗报警器的Verilog源代码及原理图，当房门打开后，15秒内若没有按下Key1,则会自动拨打设定手机号（当然，要另连接一台手机）-Using XC9572-PQ44 (Xilinx CPLD) produced by a home burglar alarm of the Verilog source code and the schematic diagram, when the door opened, within 15 seconds if there is no pressing Key1, will be set automatically dial the phone number (of course, Another connection to a mobile phone)
Platform: | Size: 918528 | Author: 李德明 | Hits:

[VHDL-FPGA-Verilog] 61003107

Description: 公共电话通话计费系统在本课程中所选择的课题是用Verilog HDL实现的公共电话。该公共电话所实现的功能有打电话、修改密码。公共电话共包括以下几个状态：挂机、待机、身份确认、修改密码、通话等五个状态。-The pay phone converses to charge system In this course the topic chosen is use Verilog HDL carry out of pay phone.The function carried out by that pay phone has already made a phone call, modified password. The pay phone totally includes a few following appearances:Hang machine, need a machine, identity to confirm, modification password, converse etc. five appearances.
Platform: | Size: 399360 | Author: 杨进 | Hits:

[VHDL-FPGA-Verilog] Verilogobouttelephone

Description: verilog的一个电话设计的源代码，初学者和设计着可以参考-a phone designed for verilog source code, can refer to the beginners and design
Platform: | Size: 1024 | Author: 陈诺 | Hits:

[3G develop] c10

Description: 用Verilog编的，用FPGA实现3G手机，属于软件无线电在WCDMA中应用-USE FPGA design 3G phone （WCDMA）by verilog
Platform: | Size: 13312 | Author: 明义 | Hits:

[VHDL-FPGA-Verilog] Phone-meter

Description: 这是电话计费器的Verilog源程序，已经编译通过，可以直接使用-This is a call accounting device Verilog source code, has been compiled by, can be used directly
Platform: | Size: 16384 | Author: 莫然 | Hits:

[VHDL-FPGA-Verilog] LCD

Description: verilog实现的在1602LCD上实现的时钟计数器，可以显示一个电话号码和动态时钟，在EP2C8上测试过-verilog achieve 1602LCD on the clock counter, you can display a phone number, and dynamic clock, tested on the EP2C8
Platform: | Size: 2048 | Author: 宋伟杰 | Hits:

[Other] SensorHubDesignFilesSourceCode

Description: sensor-hub技术是最新出来的技术，目前用在智能手机领域，手机里面的传感器越来越多，这给CPU带来很大的负担，功耗也随之提高。sensor-hub技术出来后，可以有效的解决这个问题，这是运行在lattice FPGA平台上的verilog源代码，欢迎大家一起交流学习，希望能给你带来帮助。-Sensor- the hub is the latest technology, the current use in the field of smart phones, mobile phone inside the sensor is increasing, which bring great burden to the CPU, power consumption increases.Sensor- the hub technology comes out, can effectively solve the problem, it is running on the lattice verilog code on FPGA platform, welcome to learn together, hope I can bring you help.
Platform: | Size: 9956352 | Author: 叶胜东 | Hits:

[Other] count_minut2

Description: verilog语言编写的电话计费器程序,编程环境为quartusii，实现了接电话、打电话、计时、分段计费、话费充值、欠费自动挂断等功能。-verilog language telephone billing program, the programming environment for quartusii, realized the phone, call, timing, staging billing, prepaid recharge, automatically hang up arrears and other functions.
Platform: | Size: 5111808 | Author: 曾阿然 | Hits:

[Embeded-SCM Develop] 至简设计法--万年历

Description: 万年历工程说明在FPGA设计中，数字万年历属于小规模集成电路。从原理上来讲，是典型的数字电路，包括组合逻辑电路和时序电路。基于FPGA开发除设计简便、开发成本低、电路简洁等，更具备功能设计灵活方面的优势。案例补充说明万年历是记录一定时间范围内的年历，其名称只是一种象征，表示时间跨度大。由于其功能非常常用，且极为方便人们查询使用，因此广泛应用于钟表、历书出版物、电子产品、电脑软件和手机应用等行业中。(Perpetual calendar Engineering description In FPGA design, digital calendar belongs to small scale integrated circuit. In principle, it is a typical digital circuit, including combinational logic circuits and sequential circuits. Based on FPGA development, in addition to simple design, low cost of development, concise circuit, and more flexibility in functional design advantages. Case Supplement Calendar is a record of the calendar within a certain time range, its name is only a symbol, indicating that the time span is large. Because its function is very common, and very convenient for people to use the query, so it is widely used in watches, ephemeris publications, electronic products, computer software and mobile phone application etc..)
Platform: | Size: 59392 | Author: 明德扬科教 | Hits:

[VHDL-FPGA-Verilog] NEW

Description: Verilog投币式手机充电仪清华大学数字电子技术基础课程EDA大作业。刚上电数码管全灭，按开始键后，数码管显示全为0。输入一定数额，数码管显示该数额的两倍对应的时间，按确认后开始倒计时。输入数额最多为20。若10秒没有按键，数码管全灭。(Verilog coin operated cell phone charger EDA major homework of digital electronic technology foundation course, Tsinghua University. Just put on the digital tube completely extinguished, press the start button, the digital tube display is 0. Enter a certain amount, the digital tube shows the amount of double the corresponding time, according to the confirmation began countdown. The maximum amount of input is 20. If there is no button in 10 seconds, the digital tube will die out.)
Platform: | Size: 18432 | Author: jameskk | Hits:

[VHDL-FPGA-Verilog] phone_charge

Description: 投币式手机充电仪（另一个版本）分为时间显示和金额显示两部分根据投入的金额显示两倍时间，可随时清零，确定后倒计时，结束后自动返回初始状态(Coin-operated mobile phone charger(Another version) It is divided into two parts: time display and amount display. According to the amount of input, it shows twice the time. It can be cleared at any time, determined and counted down, and automatically returned to the initial state after completion.)
Platform: | Size: 1864704 | Author: ctrlwdza | Hits:

[VHDL-FPGA-Verilog] BPSK

Description: 先用Matlab理论仿真，得出滤波器系数。再用Verilog语言在ISE环境下编写程序，通过Modelsim和ChipScope进行波形仿真和引号抓取，从而提高调试的效率。通过手机发送指令来控制上下变频器的参数。(Firstly, the filter coefficients are obtained by simulation with the theory of matlab. Then the program is written in Verilog language under ISE environment. Waveform simulation and quotation mark grabbing are carried out through Modelsim and ChipScope, so as to improve the efficiency of debugging. The parameters of up-down converter are controlled by sending instructions from mobile phone.)
Platform: | Size: 6740992 | Author: 财哥在此 | Hits:

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