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[Other resource] hdb3

Description: hdb3的发送端源代码，采用verilog可综合格式书写。已经在多款fpga和cpld芯片成功综合实现。
Platform: | Size: 1056 | Author: frankey | Hits:

[VHDL-FPGA-Verilog] hdb3 的verilog编码

Description: hdb3 的verilog编码
Platform: | Size: 1370 | Author: 20wangtong08@163.com | Hits:

[VHDL-FPGA-Verilog] 自己设计的HDB3解码

Description: 自己设计的HDB3解码，基于verilog语言
Platform: | Size: 387 | Author: lsz0718 | Hits:

[VHDL-FPGA-Verilog] HDB3解码

Description: 另一个HDB3解码，基于verilog语言
Platform: | Size: 382 | Author: lsz0718 | Hits:

[VHDL-FPGA-Verilog] hdb3_verilog

Description: modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
Platform: | Size: 22528 | Author: chengroc | Hits:

[Other Embeded program] hdb3

Description: hdb3的发送端源代码，采用verilog可综合格式书写。已经在多款fpga和cpld芯片成功综合实现。-HDB3 sending client source code, Verilog can be used to write an integrated format. Has been in several FPGA and CPLD chip integrated to achieve success.
Platform: | Size: 1024 | Author: frankey | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: hDB3的编解码模块 是在maxplusII 下验证过的 并且下到片子中都正确 -HDB3 codec module is tested under maxplusII and down to the film are correct
Platform: | Size: 3072 | Author: duan | Hits:

[Embeded-SCM Develop] tx

Description: 关于通信原理课程设计中HDB3编解码的一个VERILOG源代码-Principles of curriculum design on the communications HDB3 codec in a Verilog source code
Platform: | Size: 150528 | Author: 小亮 | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: 用verilog HDL语言，通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试 -Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
Platform: | Size: 1024 | Author: 空 | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: 这是一个很全的HDB3译码的verilog程序，用于FPGA入门所用，verilog的入门很好的程序-This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good
Platform: | Size: 1024 | Author: xxx | Hits:

[Program doc] BasedontheHDB3encoderverilogimplementation

Description: 基于verilog的HDB3编码器的实现-Based on the HDB3 encoder verilog implementation
Platform: | Size: 1024 | Author: wave | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: 采用FPGA产生数字基带系统传输码型HDB3码，采用《通信原理》例子设计。-Generated by FPGA digital baseband transmission code HDB3 code system, a " communication theory" example design.
Platform: | Size: 289792 | Author: qs | Hits:

[VHDL-FPGA-Verilog] hdb3_codedecode

Description: 用VERILOG实现的，hdb3编码器和解码器，经过前仿真和后仿真成功-Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation
Platform: | Size: 435200 | Author: Along | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: 用Verilog HDL语言进行HDB3编码，并通过Quartus Ⅱ仿真验证-With the Verilog HDL language HDB3 coding, and simulation by Quartus Ⅱ
Platform: | Size: 1362944 | Author: jabeile | Hits:

[VHDL-FPGA-Verilog] hdb3decode

Description: g.703 hdb3 decode verilog source code
Platform: | Size: 1024 | Author: James | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: verilog的HDB3编码设计，求点数
Platform: | Size: 1024 | Author: 临风 | Hits:

[VHDL-FPGA-Verilog] HDB3_CODER

Description: HDB3 verilog 编码模块 基于ISE10.1的HDB3编码模块实现。-HDB3 verilog ISE10.1
Platform: | Size: 191488 | Author: twieain | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: 在ISE软件环境下，用Verilog HDL语言实现通信中的HDB3码的编码和译码，并有仿真波形。-In the ISE software environment, using Verilog HDL language for communication in the HDB3 code encoding and decoding, and a simulation waveform.
Platform: | Size: 3206144 | Author: xuwen | Hits:

[ELanguage] hdb3

Description: 该代码使用Verilog HDL语言编写的，能够对HDB3码进行编译，该文件是完整的，可以直接在ISE软件上运行-Compile the code using Verilog HDL language, HDB3 code, the file is complete, you can run directly in the ISE software
Platform: | Size: 2328576 | Author: qidong | Hits:

[Com Port] HDB3

Description: verilog hdb3 encode decode
Platform: | Size: 198656 | Author: 胡必成 | Hits:
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