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[Other resource] NAND256R3A_VE1

Description: 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
Platform: | Size: 203769 | Author: 陈强 | Hits:

[SDK] Samsung 8G x 8 Bit NAND Flash Memory SPEC & Simulatiom model

Description: Samsung 8G x 8 Bit NAND Flash Memory SPEC and verilog Simulatiom model
Platform: | Size: 1328527 | Author: asd12321 | Hits:

[VHDL-FPGA-Verilog] NAND256R3A_VE1

Description: 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
Platform: | Size: 203776 | Author: 陈强 | Hits:

[VHDL-FPGA-Verilog] NIOSII_tutorial_code

Description: NIOSII实例代码。包括系统时钟代码，DMA(Memory to Memory)驱动代码，Fine-gained Flash Access驱动代码,Timestamp驱动代码,ISR代码，Simple Flash Access驱动代码，UART代码-NIOSII examples of code. Including the system clock source, DMA (Memory to Memory) drive code, Fine-gained Flash Access driver code, Timestamp-driven code, ISR code, Simple Flash Access driver code, UART code
Platform: | Size: 8192 | Author: danielmu | Hits:

[VHDL-FPGA-Verilog] flash

Description: fpga的FLASH读写VERILOG代码。希望对大家有用-the verilog code of fpga read/write flash
Platform: | Size: 1024 | Author: Denny | Hits:

[VHDL-FPGA-Verilog] Flash

Description: 三星flash编程Verilog程序，单页编程，支持K9K4G08芯片-Samsung' s flash programming Verilog program, single-page programming, support K9K4G08 chip
Platform: | Size: 1024 | Author: 不知道 | Hits:

[VHDL-FPGA-Verilog] M25P32_VG_12_50MHZ

Description: Serail Nor Flash Memory Model
Platform: | Size: 221184 | Author: Chris | Hits:

[VHDL-FPGA-Verilog] flash

Description: 此源码为基于FPGA的使用VERILOG编写的FLASH存储器的读写程序。-The source code for the FPGA-based FLASH memory using the VERILOG prepared to read and write procedures.
Platform: | Size: 202752 | Author: 王强 | Hits:

[VHDL-FPGA-Verilog] Pulse_Width_Modulator_Altera_MAX_II_CPLD_Design_Ex

Description: 来自于ALTERA官方网站。 本文档详细介绍怎样利用MAX® II CPLD 来实现脉冲宽度调制(PWM)。本设计还利用了MAX II CPLD 的内部用户闪存振荡器，不需要采用专门的外部时钟。 附有verilog源程序。-From ALTERA website. This document details how to use the MAX ® II CPLD to implement pulse width modulation (PWM). This design also uses the MAX II CPLD' s internal oscillator user flash memory, without using a special external clock. With verilog source.
Platform: | Size: 291840 | Author: 无小品 | Hits:

[FlashMX] am29bdd160g

Description: 16 Megabit (1 M x 16-bit/512 K x 32-Bit), amd 公司 2.5 V电压, flash存储器仿真读写verilog 模型。-16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory verilog model.
Platform: | Size: 20480 | Author: cmic | Hits:

[Other] SPI-flash

Description: ST公司的M25Pxx SPI flash memory的verilog仿真模型，该模型准确地描述了SPI flash memory的行为，包括读，写，擦除等操作，可以用来挂在带有SPI接口的soc外部，方便验证SPI接口。 -ST' s verilog simulation model M25Pxx SPI flash memory, the model accurately describes the SPI flash memory behavior, including reading, writing, erasing and other operations can be used to hang outside the soc with SPI interface to facilitate verification SPI interface.
Platform: | Size: 139264 | Author: alex wang | Hits:

[Other Embeded program] NAND01GR3B_VH1

Description: 存储器verilog仿真代码，可以产生仿真向量对存储器测试。flash存储器选用march算法进行仿真测试。-Memory Verilog simulation code, you can generate simulation vector on the memory test. Flash memory selection of March algorithm simulation test.
Platform: | Size: 815104 | Author: cmic | Hits:

[FlashMX] N25Q00AA13E_VG13

Description: This a source code for flash memory in verilog and the flash memory used is samsung k9 whose module can be found online-This is a source code for flash memory in verilog and the flash memory used is samsung k9 whose module can be found online
Platform: | Size: 1846272 | Author: asidana3 | Hits:

[VHDL-FPGA-Verilog] FPGA_flash设计

Description: 我们的设计是用一个FSM控制器来控制发送什么命令，flash模块判断FSM发送过来的state信号来选择应该执行什么操作，当命令写入或者读出后，会发送一个flag_done命令，这个命令让我们判断上个指令是否完成，如果完成后FAM将发送下一个命令.(Our design uses a FSM controller to control what commands are sent. The flash module judges the state signal sent by the FSM to select what operation should be performed. When the command is written or read out, a flag_done command is sent. This command lets us judge whether the last word is finished or if the FAM will be sent after completion. The next command)
Platform: | Size: 249856 | Author: 硅渣渣 | Hits:

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