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[Other resource] dds_ise7.1_su

Description: 用Verilog语言实现信号发生器，包括AM，FM,PM，ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
Platform: | Size: 5426 | Author: lee | Hits:

[Embeded-SCM Develop] DDSsignalgen

Description: dds信号发生器-dds signal generator ask, am, fskdds signal generator ask, am, fskdds signal generator ask, am, fskdds signal generator ask, am, FSK
Platform: | Size: 3331072 | Author: appolo | Hits:

[VHDL-FPGA-Verilog] ASKmoudel

Description:
Platform: | Size: 128000 | Author: 孙昱 | Hits:

[VHDL-FPGA-Verilog] dds_ise7.1_su

Description: 用Verilog语言实现信号发生器，包括AM，FM,PM，ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
Platform: | Size: 5120 | Author: lee | Hits:

[VHDL-FPGA-Verilog] ASK_32M

Description: ASK实现 运用verilog语言编程实现，目标FPGA为EP3C25Q240-ASK use verilog language programming to achieve the realization of the target FPGA for EP3C25Q240
Platform: | Size: 9006080 | Author: 赵鹏飞 | Hits:

[VHDL-FPGA-Verilog] module_dem

Description: 用verilog编写的信号调制解调程序，包括ask,fsk,qpsk的fpga实现-Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation
Platform: | Size: 6068224 | Author: yu | Hits:

[VHDL-FPGA-Verilog] askcodec

Description: verilog实现ask编码器，仿真通过-ask encoder verilog implementation, simulation by
Platform: | Size: 252928 | Author: Along | Hits:

[Other] 2fsk

Description: 2ASK 模块的Verilog实现，附带完整的测试文件-2ASK Verilog module implementation, with a complete test file
Platform: | Size: 3794944 | Author: fqzxw | Hits:

[Other] 2ask

Description: 2ASK 模块的Verilog实现，附带完整的测试文件-2ASK Verilog module implementation, with a complete test file
Platform: | Size: 3272704 | Author: fqzxw | Hits:

[VHDL-FPGA-Verilog] Verilog

Description:
Platform: | Size: 13312 | Author: 明义 | Hits:

[VHDL-FPGA-Verilog] FPGA_verilog

Description: FPGA很有价值的27实例:如ASK、PSK、FSK调制与解调VHDL程序及仿真等-FPGA verilog
Platform: | Size: 1278976 | Author: 安 | Hits:

[Program doc] csa

Description: This common interview question ask about verilog-This is common interview question ask about verilog
Platform: | Size: 10240 | Author: Hank | Hits:

[VHDL-FPGA-Verilog] ASK_modulator

Description: 振幅键控ASK的调制解调Verilog实现，带测试文件-ASK amplitude shift keying modulation and demodulation Verilog implementation, with the test file
Platform: | Size: 40960 | Author: wang | Hits:

[VHDL-FPGA-Verilog] ASKencoderanddecoder

Description: ASK编码器与译码器，使用Verilog编写-ASK encoder and decoder, the use of writing Verilog
Platform: | Size: 251904 | Author: 潘映波 | Hits:

[Communication-Mobile] code

Description: <基于Verilog HDL的通信系统设计>源码，包含ASK,FSK,PSK,QPSK,PPM等的调制解调-< Verilog HDL-based communication system design> source, including ASK, FSK, PSK, QPSK, PPM and other modem
Platform: | Size: 6144 | Author: cjl | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
Platform: | Size: 6281216 | Author: 王凡 | Hits:

[VHDL-FPGA-Verilog] ask-psk-qpsk

Description: ask，psk ,qpsk 调试解调verilog源码，是无线通信fpga设计这本书上的，比较简单的实现方式-ask, psk, qpsk debugging demodulator verilog source, is a wireless communications fpga design of this book, a relatively simple way to achieve
Platform: | Size: 5120 | Author: 陈占田 | Hits:

[VHDL-FPGA-Verilog] ad9850

Description: 介绍了用FPGA控制DDS产生任意频率范围之内的可调制正弦波，13位BPSK,ASK等。控制字由串口写入。-verilog control AD9850 to get psk ask
Platform: | Size: 1415168 | Author: chen | Hits:

[VHDL-FPGA-Verilog] ASKMod

Description: 能够实现一种ASK的调制方法，语言为verilog(Can achieve a modulation method of ASK, the language is Verilog)
Platform: | Size: 10240 | Author: 亚东 | Hits:

[SCM] ASK

Description: ASK调制,verilog VHDL 编程语言实现，其中带有仿真文件(ASK modulation signal)
Platform: | Size: 22489088 | Author: 嘘 | Hits:
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