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[VHDL-FPGA-Verilog] Xilinx_sparten3E_communication_between_key_board_a

Description: 在Xilinx Spartan-3E的开发板中，实现键盘和VGA显示器的通信的源代码，与大家分享：-In the Xilinx Spartan-3E development board, the realization of the keyboard and VGA display the source code of communication to share with you:
Platform: | Size: 2048 | Author: lijq | Hits:

[VHDL-FPGA-Verilog] project4Xilinx

Description: vga code for xilinx
Platform: | Size: 1867776 | Author: kamal | Hits:

[VHDL-FPGA-Verilog] vga_geometry_xps92i_s3_v01_00_03

Description: Here an embedded System-on-Chip is build, in an Xilinx Spartan-3 FPGA with Microblaze as the processor.A PLB core System is made with the VGA IP core attached to it. The software written for the MicroBlaze processor specifies the object, the color and the movement of the display. The functionality of the module is verified by implementation on Spartan 3.-Here an embedded System-on-Chip is build, in an Xilinx Spartan-3 FPGA with Microblaze as the processor.A PLB core System is made with the VGA IP core attached to it. The software written for the MicroBlaze processor specifies the object, the color and the movement of the display. The functionality of the module is verified by implementation on Spartan 3.
Platform: | Size: 3730432 | Author: Praveen | Hits:

[VHDL-FPGA-Verilog] cameralink

Description: 由于目前基于CameraLink接口的各种相机都不能直接显示，因此本文基于Xilinx公司的Spartan 3系列FPGAXC3S1000-6FG456I设计了一套实时显示系统，该系统可以在不通过系统机的情况下，完成对相机CameraLink信号的接收、缓存、读取并显示 系统采用两片SDRAM作为帧缓存，将输入的CameraLink信号转换成帧频为75Hz，分辨率为1 024×768的XGA格式信号，并采用ADV7123JST芯片实现数模转换，将芯片输出的信号送到VGA接口，通过VGA显示器显示出来-As the CameraLink interface is currently based on a variety of cameras can not directly display, this article based on Xilinx' s Spartan 3 series FPGAXC3S1000-6FG456I designed a set of real-time display system, the system can be achieved without machine case through the system to complete the CameraLink cameras signal reception, cache, read and display systems use two SDRAM frame buffer as the input signals into the CameraLink frame rate of 75Hz, a resolution of 1 024 × 768 for XGA format signal, and using ADV7123JST chip digital-analog conversion, the chip output signal to the VGA port, through the VGA display monitor
Platform: | Size: 13312 | Author: lilei | Hits:

[VHDL-FPGA-Verilog] VGA

Description: 基于Xilinx SPARTAN-3E开发板 的VGA实验代码，VHDL编写，非常适合初学者学习FPGA实现VGA控制-Based on Xilinx SPARTAN-3E development board VGA test code, VHDL written, very suitable for beginners to learn to achieve VGA control FPGA
Platform: | Size: 108544 | Author: 张小琛 | Hits:

[VHDL-FPGA-Verilog] main1

Description: vhdl code for vga port interfacing of spartan 3 (xilinx) displaying colour pattern
Platform: | Size: 6144 | Author: sachin | Hits:

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